Vdd and Vdda on S32K11x

[procrastinatefr]

Hello,

This is a series of questions related to the digital and analog voltage supply for the S32K11x MCUs.

Per the datasheet, in "Table 2. Voltage and current operating requirements" it is shown that analog Vdda must be within +/- 100 mV from digital Vdd (see screenshot below). However, there is no mention of this relationship in "Table 1. Absolute maximum ratings".

If Vdda must be developed from a different source than Vdd, it is possible that during power-up the Vdda will not follow Vdd that closely. Furthermore, if it is desired to power-down Vdda, the above-mentioned differential voltage will be big.

• Is it safe to assume that the IC will not be permanently damaged when Vdda is much lower than Vdd (or slightly higher during the power up than Vdd, but still below the maximum operating Vdda of 5,5 V) --- if the analog section is not used/not operating?
• Furthermore, is it safe to have Vdda near zero for prolonged periods of time (such as in partial power-down of the functions of the ECU), while the digital section is operating/executing?
• Would it be required to specifically shut-down and/or otherwise initialize the analog section before the Vdda can be brought down?
• In addition: On the IC that we use currently (S32K116 48pins package), the Vrefh of the ADC is bonded to Vdda; if an ICs has a separate Vrefh, would the same considerations apply as we state above -- can both Vdda and Vrefh be brought to zero for prolonged periods of time, without any damage to the IC?

Thanks in advance for any help you can provide!

[vmarten]

Hello Daniel,

Your answer is undoubtedly correct for proper operations of the IC.

But what about a situation when ADC and/or any related analog circuits powered by the Vdda -- are NOT operating.

Tables referenced above are specifically for OPERATING conditions. The Absolute maximum ratings table makes no mention of it:

Specifically, the Vrefh is allowed to be even slightly below 0 V.

Would the IC be damaged if Vdda is not within 100 mV window from Vdd?

Are there any protection structures between Vdda and Vdd, such as an equivalent of back-to-back protection diodes?

Thank you for your help!

[danielmartynek]

Hello Victor,

The VDDA domain is internally connected directly to VDD in some packages and if a package has a seperate VDDA pin, it must be filtered and connected to VDD on the PCB. No need to specified it in the absolute max ratings as VDD is VDDA. The 0.1V difference is allowed for RF-AC signal only.

Regards,

Daniel 

[vmarten]

Hello Daniel,

Thank you for your clarification, please consider this matter closed.

[danielmartynek]

Hello Nicolas,

The S32K1xx datasheet (rev12) is clear in this regard.

VDD and VDDA must be shorted to a common source on the PCB.

Table 3. Voltage and current operating requirements for S32K1xx series.

Also, S32K1xx RM, rev12:

If you need a difference ADC voltage reference, then use a package with VREFH/VREFL pins.

VREHF can be in the range of 2.7V to VDDA + 0.1V

Regards,

Daniel