TJA1103A with S32K358

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TJA1103A with S32K358

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yinfeiHe
Contributor I

Hello NXP community,

I'm currently using SWK3_TCPIP_1_0_3_D2306_updatasite.zip package.In the ETH_T_initPhys() function.

I expected to get a valid PHY ID from this register, but this seems to be an erroneous value [0] 65535. Is there something I might be doing incorrectly in my reading process, or could there be other factors at play? Any guidance or suggestions would be greatly appreciated.

Thank you in advance for your insights!

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7 Replies

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

the Eth_T_InitPhys() first try to find PHY address by reading PHY ID registers through possible PHY addresses. So you get no response for the phy address your TJA1103 is pin strapped to?
What is the HW pin strapping option you have in fact? Do you use some NXP board or own designed one?
Can you share relevant circuitry?
Generally be sure all is properly powered, PHY out of reset, MDIO/MDC lines pull-upped, MCU pins initialized. You can also measure MDIO/MDC with scope analyzer to know real signals. 

BR, Petr

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4,748 Views
yinfeiHe
Contributor I

HI,

Now I have found the PHY address, and you can share with me the modification of the code to RGMII mode. I need to modify the register content, because the default RMII of the project, I modified it to RGMII, and there are many changes that I did not notice

Thank you

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4,737 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

so you are now able to find PHY address and read PHY ID? What was a changes done in fact?
For a setup a best way would be a pinstrapping option, I think. If not used, PHY initialization is outlined in chapter 4.2 of the AN13137 (TJA1103 Application note).

BR, Petr

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4,715 Views
yinfeiHe
Contributor I

Hi

I didn't make any changes, and the resulting NXP sample code wasn't fully written or validated. So I want a copy of the verified RGMII schema code

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4,603 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

see below feedback from AE Apps team...

activation of RGMII involves at least two steps:

  1. Setting xMII-Mode to RGMII
    • Enable reconfiguration (see 6.7 Reconfiguration in the datasheet)
    • Select RGMII in MII_BASIC_CONFIG
  2. Selecting the clock delay for for RGMII
    • Enable reconfiguration (see 6.7 Reconfiguration in the datasheet)
    • Enable the clock delay as needed for each clock RGMII_TXC_DELAY_CONFIG and RGMII_RXC_DELAY_CONFIG
    • The default phase shift is set to 90° (2ns), which is what you need most of the time

If a delay on a clock line is needed or not, depends on the other device and how it is configured. In most cases you will need a delay of 2ns (90°) per clock line. For example the TJA1103 delays the RXC line and the MAC delays the TXC line. See next diagram

RGMII clock delay.png

Also note, that two of the RGMII modes can be directly selected via pin-strapping:

  • RGMII
  • RGMII-ID (delay on RXC)

 

BR, Petr

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4,808 Views
yinfeiHe
Contributor I

Hi,

We designed the target board ourselves.All of our CONFIG configurations for 1103A are open.MDIO/MDC both have signals,I have shared the circuit diagram in the attachment.

 

Thank you for your busy reply, please help me solve the problem

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4,856 Views
yinfeiHe
Contributor I
The RGMII mode is used
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