Single mailbox for multiple message.

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Single mailbox for multiple message.

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arvindupadhyay
Contributor II

Hi friends,

 

Currently I am working on S32K144 microcontroller , I want to know how to configure single RX mailbox  for multiple CAN messages or multiple message id.

 

Regards,

Arvind 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

You can just set a mask acceptance register(s) properly, means clear all bits. In that case the received ID is “don’t care”. If you want to receive both standard and extended frames then at least 2 MBs should be set for receive, one for standard (IDE=0) and other for extended frames (IDE=1).

BR, Petr

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arvindupadhyay
Contributor II

Hi Petr,

Thank you for reply, Now my code is working fine..

Regards,

Arvind

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2,615 Views
arvindupadhyay
Contributor II

Hi Pert,

Can you tell me how to configure multiple mailbox to receive different - different message ID.

I configure 2 mailbox for 2 different message ID but is working for only one message ID.

Regards,

Arvind

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2,615 Views
PetrS
NXP TechSupport
NXP TechSupport

There could be no issue to configure more MBs to receive different IDs. You have to properly configure MB’s IDs and Mask registers. Do you use individual or global mask registers?

In your case (2 mailbox for 2 different message ID) how do you configure the module in fact?. Which ID is received and which not? Can you share your code?

BR, Petr

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arvindupadhyay
Contributor II

/* Initialize and configure clocks
* see clock manager component for details */
CLOCK_SYS_Init(g_clockManConfigsArr, FSL_CLOCK_MANAGER_CONFIG_CNT,
g_clockManCallbacksArr, FSL_CLOCK_MANAGER_CALLBACK_CNT);
CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_FORCIBLE);

/* Initialize pins See PinSettings component for more info */
Pins_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);

/* Initialize FlexCAN driver */
FLEXCAN_DRV_Init(0, &canCom1_State, &canCom1_InitConfig0);

 FLEXCAN_UpdateMailBoxMask(0, 1UL, 0x7A5);

 FLEXCAN_UpdateMailBoxMask(0, 2UL, 0x7B5);

/* Set bit rate */
flexcan_time_segment_t myBitRate = {0x04, 0x07, 0x01, 0x00, 1};
FLEXCAN_DRV_SetBitrate(0, &myBitRate);

g_dataInfo_rx.data_length = 8U;
g_dataInfo_rx.msg_id_type = FLEXCAN_MSG_ID_STD;
g_dataInfo_rx.enable_brs = false;
g_dataInfo_rx.fd_enable = false;
g_dataInfo_rx.fd_padding = 0U;

/* Configure Rx message buffer with index 1 and rx_mb_id  */
FLEXCAN_DRV_ConfigRxMb(0, 1UL, &g_dataInfo_rx, 0x7A5);

/* Configure Rx message buffer with index 2 and rx_mb_id  */
FLEXCAN_DRV_ConfigRxMb(0, 2UL, &g_dataInfo_rx, 0x7B5);

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2,615 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

if FLEXCAN_UpdateMailBoxMask() sets the individual mask register then use 0x7FF mask for both. Then MB0 should receive message with ID=0x7A5 and MB1 message with ID=0x7B5.

BR, Petr

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arvindupadhyay
Contributor II

Hi ,

It is not working as per acceptation , can you send me sample code for configuration of two mailbox as receiver with two different id.

Regards,

Arvind

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