Dear NXP community,
As a first step I want to configure ITM and SWO such that I can push "Software Packets" on the serial wire using NRZ encoding. Once configured I should be able to write to stimulus registers of ITM and this should result in data coming out of SWO. From my understanding I need to configure the following:
1. Configure and enable GPO[10](This is done in reference to *.xls attached to the S32K3xx RM):
2. I also configure and enable TRACE_CLK, I am not sure this is necessary, can you explain/clarify. To make sure the TRACE_CLK works, I multiplexed it out to a pin and checked with a scope:
3. Next, global enable for ITM and DWT and also non-invasive debug enable:
4.Unlock and configure the funnel 0 and funnel 2:
5. Init SWO
6. Init ITM
7. Write to stimulus port using the following fnc.:
This however yields no results.
To be sure I am using correct base addresses for the Core-Sight peripherals I read the DEVTYPE, DEVID and all ID registers. By knowing these I was able to find the corresponding documentation(at least I think so)
TPIU: "coresight_soc400_technical_reference_manual_100536_0302_01_en.pdf"
ITM: https://developer.arm.com/documentation/ddi0489/f/instrumentation-trace-macrocell-unit/itm-programme...
SWO: https://developer.arm.com/documentation/ddi0314/h/Serial-Wire-Output/SWO-programmers-model
Both funnels: "coresight_soc400_technical_reference_manual_100536_0302_01_en.pdf".
Can someone confirm if these are correct?
Further observations:
When the SWO encoding is set to NRZ the SWO pin goes from LOW to HIGH, this shows the SWO config is at least partially right, correct?
Writing to stimulus registers always seems to be discarded. Writing to them continuously in a while(1) loop never renders "ITM BUSY"(BUSY bit in ITM_TCR reg) nor does reading an ITM stimulus registers ever return 0(meaning stimulus reg full). This indicates wrong ITM configuration.
I also tried reading both ETF after the funnel 0 and also the ETF after the funnel 2, never any change, it always empty, which further indicates incorrect ITM config.
Every "How to" I found online says to unlock the ITM but reading the LSR of the ITM reads 0, meaning the lock is not implemented.
From my understanding, once the switch from JTAG to SWD happens and all the config mentioned above works/is correct, writing to stimulus registers should result in data being pushed out of SWO.
From my understanding the TPIU configuration is not needed when only using SWO, is that correct?
Another thing I was not able to figure out is how to use the Core-Sight integration test registers, this should help me with troubleshooting, anybody any experience with those?
Any idea is welcome.
I have attached the zipped code I am using, there you can see the base addresses of the core-sight components, Is it possible I am using wrong addresses ?
Sorry for a long post
With regards,
Viktor
Hello @viktor_marhansky,
I'm sorry for the delayed response.
The topic is under an internal discussion right now.
In S32DS 3.5, a new project with prinft ITM can be created, but the retarget_itm library does not work as expected.
Once I have some new information, I will update the thread.
Best regards,
Daniel
Hello @viktor_marhansky,
I'm sorry for the delayed response.
The topic is under an internal discussion right now.
In S32DS 3.5, a new project with prinft ITM can be created, but the retarget_itm library does not work as expected.
Once I have some new information, I will update the thread.
Best regards,
Daniel
