I finally solved the problem, and maybe I can give you some help:
1. I chose s32k341 in EB, but there is a macro definition only s32k342, resulting in an incorrect value.
2. My project does not use QSPI and EMAC, but BIST needs to enable the clock of these peripherals.
Hello,
In other words, your watchdog timer guarding BIST execution has expired and BIST was aborted.
You can enhance timer in the STCU2 Watchdog Granularity (WDG)
RFSF is most probably set due to the WDG timeout.
Best regards,
Peter
Hello,
I try to increase the STCU2 Watchdog Granularity (WDG) to 0x2625A00(about 16 seconds), but the result doesn't change.
The codes also meet these prerequisities:
STCU2 regs after ST_DONE functional reset are shown below.
Could there be other causes?
thank you
Hello,
Hmm, ok. I never used SPD to run the BIST.
But you can also have following issue:
Can you play with pointer and reduce number of concurrent BIST running? Not sure which degree of configuration SPD offers.
Also, it is possible
https://community.nxp.com/t5/S32K/STCU2-internal-errors-and-SPD-BIST-BIST-DIAGNOSTIC-CFG/m-p/1813872
best regards,
Peter
I finally solved the problem, and maybe I can give you some help:
1. I chose s32k341 in EB, but there is a macro definition only s32k342, resulting in an incorrect value.
2. My project does not use QSPI and EMAC, but BIST needs to enable the clock of these peripherals.
