SPI limitation variant management in PCS

[hafifi]

Hello NXP team,

I'm facing limitation in variant management when configure PCS identifier between two variant so Can you please let me know which RTD package fix this limitation to be PCS support variant management or workaround to fix that ? 

I'm using RTD package:

S32K3_RTD_4_0_0_P25_D2406_ASR_REL_4_7_REV_0000_20240620

Sw Versoin : 4.0.0

Thanks

Hossam Afifi

[Senlent]

Hi@hafifi

If possible, I would appreciate it if you could describe your problem more clearly.

I'm guessing you want to set multiple PCS, right?

If that's the case, I've thought of two methods:

1.First

2.Second.

Please refer to the document: User Manual for S32K3_S32M27x SPI Driver

[Senlent]

Hi@hafifi

Could you please clarify your question regarding the PCS identifier and variant management?
I'm not fully sure I understand the limitation you're facing. 
If you could describe the exact issue or error you're encountering, I’ll be happy to help you find the right RTD version or workaround.

[hafifi]

Hi Senlent

Thank you for reply.

I need to write in this register TCR bit 26:24 but when i tried writing  it the SW raised exception handler, Could you please explain this behavior ? 

Thanks

hafifi

[Senlent]

Hi@hafifi

There are some considerations when operating this register.

1.

2.

So which instance are you using? What is the PCS value being written? Did you operate on any unsupported PCS bits?

[hafifi]

Hi Senlent

I'm using LSPI0 and PCS[0], I'm not setting in CFGR11[PCSCFG] : 1 

Thanks

hafifi

[Senlent]

Hi@hafifi

Also, please double check this limited.

70.3.2.1Transmit and command FIFO commands
You must initialize Transmit Command (TCR) before enabling LPSPI in Peripheral mode, although this register is not updated until after LPSPI is enabled. After LPSPI is enabled, you must make changes to this register only when LPSPI is idle. In Peripheral mode, the LPSPI command word in this register controls SPI attributes. Before the PCS input asserts, the transmit FIFO must be filled with transmit data, or the transmit error flag sets.

[hafifi]

Hi Senlent,

I have tried to writing in the TCR register PCS bit after SPI initialization, because to make sure after writing to avoid any over writing happen on it again but the same behavior.
Can we do that in EB tresos instead of write on it in runtime  ?

Thanks

hafifi

[Senlent]

Hi@hafifi

Could you share your test project?