S32k388-evb Gmac overflow packet MTL flush

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

S32k388-evb Gmac overflow packet MTL flush

844 次查看
oliver777777
Contributor II

Hi, 

 

I'm currently running into an issue flushing overflow error packets from our Ethernet MTL queues. From my understanding, in S32k3xx RM 75.3.3.2.3, the application or DMA must assert a flush signal in order to overcome overflow error packets. 

 

In accordance to 75.16.7.2.1 of the RM for GMAC Programming, I use Gmac_Ip_DisableController and Gmac_Ip_EnableController provided by S32DS to accomplish the flush, but after flushing, the GMAC RX interrupt no longer fires and I suspect the DMA controller was not recovered. 

 

Am I missing any notable steps in here being able to account for overflow and GMAC err packets in general?

0 项奖励
回复
2 回复数

758 次查看
bryan_brauchler
NXP Employee
NXP Employee

Hello Oliver,

 

Looks like we missed you this morning,

 

I was hoping you could provide the source code of the disable/enable sequence that you are using to see if we can replicate the behavior on our side, and the interface mode (MII, RMII, RGMII)

 

Best,

 

Bryan

0 项奖励
回复

737 次查看
oliver777777
Contributor II

Hi, 

I did abit more digging around but wasn't able to reset the TJA clock correctly. Should it be done through Siul2_Dio_Ip_WritePins(PTD_LOW,17,0) then 1 for the 388-evb?

 

I wasn't able to find any Dio reset in the Gmac_Ip_Init API but that seems to be the function that allows the controller to come back up in addition to DisableController, Enable Controller. 

 

0 项奖励
回复