Hi Jakub,
I am sorry there is no sample code for FTM5.
But you can try to test it just modify below registers:
SIM_FTMOPT0[FTMnCLKSEL]=0
PCC_FLEXTMRn[PCS]=0
FTMn_SC[CLKS]=0b11
External clock need to be connect to TCLK0.
I have test on S32K148_Project_FTM example.
The CLKOUT signal(PTE10) output clock to TCLK0(PTB1), then I can see the FTM0_CH0 output signal.
PCC->PCCn[PCC_PORTB_INDEX ]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTB */
PORTB->PCR[1]|=PORT_PCR_MUX(4); /* Port B1: MUX = ALT4, TCLK0 */
PORTE->PCR[10]|=PORT_PCR_MUX(2); /* Port E10: MUX = ALT2, CLKOUT */SIM->CHIPCTL=SIM_CHIPCTL_CLKOUTEN_MASK|SIM_CHIPCTL_CLKOUTSEL(0x02); //CLKOUT output 0010b - SOSC DIV2 CLK
PCC->PCCn[PCC_FTM0_INDEX] &= ~PCC_PCCn_CGC_MASK; /* Ensure clk disabled for config */
PCC->PCCn[PCC_FTM0_INDEX] |= PCC_PCCn_PCS(0b00)//PCC_PCCn_PCS(0b010) /* Clock Src=1, 8 MHz SIRCDIV1_CLK */
| PCC_PCCn_CGC_MASK; /* Enable clock for FTM regs */
Best Regards,
Robin
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
