S32K344 ADC crosstalk

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S32K344 ADC crosstalk

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olof1
Contributor I

Dear NXP,

I have encountered a problem with ADC crosstalk on s32k3 and can reproduce the issue on your development board S32K344EVB-Q257, where the measured voltage on a previous channel noticeably affects the measurement on the sequent channel. I have slightly modified your adc example project by adding some channels and using continuous conversion to more easily analyse the problem. But the same sampling settings are used (sampling duration 120, no presampling, no average etc.). By increasing the voltage on the first channel from 0 and 5 V the following channel increase by around 10 mV. For example ADC1_S9 affects ADC1_S10, ADC1_S10 affects ADC1_S11 (configured channels in the my modified adc example project).

What are your suggestions to efficiently minimise this crosstalk? I have tried different ways to increase the sampling duration, presampling etc. which lowers the dependency on the previous channel, but this also of course increase the total sampling time. For my application speed is crucial due to for example high frequency PWM.

I'm attaching the project I have used. Using RTD 2.0.0.

BR
Olof

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Olof,

Please read the AN4373 Cookbook for SAR ADC Measurements 
Adc Sample Time is also called acquisition time in AN4373. Note the RAD_INPUT(ADC Input Resistance) should smaller than 4.6kΩ mentioned in DataSheet. Please check the ADC pin external circuit parameters. If you don't want to increase sample time, then you should change the external circuit.

Table 32. SAR ADC.jpg
During the acquisition time (TAQ), the sampling capacitor (CSH) must be charged to an acceptable minimal portion of the voltage level of the measured input voltage. The initial voltage VCSH0 is equal to the previous channel voltage conversion. If sample time is too small, the voltage sampled by the second channel may be affected by the voltage of the previous channel.


Best Regards,
Robin
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