Hello NXP team,
I’m currently testing the SWT watchdog functionality on multiple S32K3 devices and found differences in behavior across parts.
I’ve attached my full S32 Design Studio workspace for reference, but here’s a summary of what I observed:
Tested Configurations
MCU | EVK | Behavior |
S32K311 | S32K311 EVK | Watchdog timeout interrupt callback triggered as expected. Reset on timeout not occurring. |
S32K344 | S32K344 EVK | Watchdog timeout interrupt callback triggered as expected. Reset on timeout not occurring. |
S32K322 | Custom board (100-pin) | Watchdog timeout interrupt callback not invoked and Reset on timeout not occurring , even though SWT is initialized and serviced. |
Software & Environment
- MCU: S32K322 (100-pin package)
- RTD: S32K3_RTD_6_0_0_QLP04_D2508_ASR_REL_4_7_REV_0000_20250822
- IDE: S32 Design Studio for S32 Platform
- SDK components used:
- Swt_Ip
- Clock_Ip
- IntCtrl_Ip
- Pit_Ip
Issue Summary
- Reset on timeout is not working on S32K311 and S32K344.
The watchdog interrupt triggers correctly, but no device reset occurs even when the watchdog is intentionally left unserviced. - SWT interrupt callback is not invoked on S32K322 (100-pin).
The same code and configuration that worked on S32K311 and S32K344 fails to generate an interrupt here.
PIT interrupt works fine — so the NVIC setup seems functional.
What I’ve Verified
- SWT0 interrupt vector is enabled and mapped:
- IntCtrl_Ip_InstallHandler(SWT0_IRQn, Swt_Ip_Swt0_Isr, NULL_PTR);
- PIT timer interrupt is firing correctly → confirms interrupt controller setup is working.
- The watchdog counter appears to be running (checked through debugger).
- No lock or configuration error bits set in the SWT registers.
- Tested with and without servicing the watchdog — no interrupt seen on S32K322.
- Used default RTD Swt_Ip_Cfg0 configuration.
Code Snippet
Here’s a simplified version of my test case:
void Swt_CallbackNotification0(void)
{
u32NumOfNotifications++;
}
int main(void)
{
Clock_Ip_InitClock(&Clock_Ip_aClockConfig[0]);
IntCtrl_Ip_Init(&IntCtrlConfig_0);
IntCtrl_Ip_InstallHandler(SWT0_IRQn, Swt_Ip_Swt0_Isr, NULL_PTR);
IntCtrl_Ip_InstallHandler(PIT0_IRQn, PIT_0_ISR, NULL_PTR);
Pit_Ip_Init(PIT_INST_0, &PIT_0_InitConfig_PB_BOARD_InitPeripherals);
Pit_Ip_InitChannel(PIT_INST_0, PIT_0_CH_0);
Pit_Ip_EnableChannelInterrupt(PIT_INST_0, CH_0);
Pit_Ip_StartChannel(PIT_INST_0, CH_0, PIT_PERIOD);
Swt_Ip_Init(SWT_INST, &Swt_Ip_Cfg0);
for (uint32_t i = 0; i < NUM_OF_NOTIFICATIONS; i++)
{
Swt_Ip_Service(SWT_INST);
while ((u32NumOfNotifications <= i)) { }
}
Swt_Ip_Deinit(SWT_INST);
DevAssert(TRUE);
}
Request for Support
- Is there any known difference in SWT interrupt routing or configuration on the S32K322 (100-pin) variant compared to S32K311/344?
- Are there any SoC-level differences (e.g., reset domains, RSTGEN configuration, or PRAM protection) that prevent SWT reset or interrupt generation?
- Could you please confirm whether reset-on-timeout is expected to work with the current RTD (6.0.0) configuration?
Attachments
- Full S32 Design Studio workspace (ZIP)
Thank you for your support — looking forward to your feedback so I can resolve this quickly.
Best regards,
Yusup
