S32K312 W/R FULL access MPU address leads to MemManage exception

[Jason_1234]

Hi,

As you may see, current MSP 0x20403088, LR(R14) = 0xFFFFFFF9;

And the MSP address is in the Region 3 (0x204021E0 + 4k = 0x204031E0)

But in my software, when "BX LR" executed and trying to return from exception handler, it will lead to MemManage exception.

According to BX and Exception entry behavior in cortex-m7, we may know software should restore size 0x20 data from MSP and go to 0x4de730 to execute.

According to test, if I set the Region 3 size from 4k to 8k manually in debugger, then the software can go to the 0x4de730 successfully. So I think the MemManage exception is caused when BX executed and trying to pop data from stack, hardware considers that the address in stack is not accessible, but anyone can explain why MemManage exception happened in this case?

Note: we didn't configure any MPU regions for code flash sections, so no execution protection in our software.

Thank you!

[danielmartynek · Accepted solution]

Hi @Jason_1234,

Can you allign the base address of each region to the size of the selected region?

For a 4KB region, base address aligned to 0x1000

Arm®v7-M Architecture Reference Manual

Thanks,

BR, Daniel

[Jason_1234]

Hi @danielmartynek ,

Thank you for the support!

My issue solved.

Best Regards.

[danielmartynek]

Hi @Jason_1234,

What kind of MemManage execption is it?

Can you read the CFSR Register?

Is MMARVALID set?

Thanks,

BR, Daniel

[Jason_1234]

Hi @danielmartynek ,

The MMFSR.MUNSTKERR is set.

And we also has the other error, when executed this ldbr r1, [r2], the MemManage exception happen.

[r2] = 0x2040C71C

The MPU error as following: MMFSR = 0x82 (0x2040C71C no data access permission)

But as you may see, the 0x2040C71C is in the region 15, and w/r access is fine.

Thank you!

Best regards,