S32K312 Understanding SRAM

[Hareesh_S]

Hello,

I am using an S32K312 MCU and have run out of SRAM (>32KB).

From my understanding, the K312 has 96KB of SRAM, where 32KB is standby RAM, 32KB is no_cacheable and the last 32KB is shareable.

I do not fully understand the practical limitation to these sections, specifically with respect to the shareable section, given that the K312 is a single core and non-lockstep MCU. (I assume no_cacheable implies that data here cannot be moved to cache?)

Is there a section of the reference manual I should refer to for more information on this? All I have found is AN13388 but it only seems to describe the standby section in detail.

Additionally, what are int_sram_fls_rsv, int_sram_results and int_stack_dtcm sections for?

Tying back to my initial problem, if I am using more than 32KB ram (statically) do I need to manually place certain variables in the other ram sections? And how does this behaviour change WRT stack/heap? Can my stack/heap grow more than 32KB?

Much thanks in advance!

[davidtosenovjan]

int_pflash: Main program flash memory for storing application code.
int_dflash: Non-volatile memory for storing persistent data like configuration or logs.
int_itcm: Fast memory for critical code execution with zero wait states.
int_dtcm: Fast memory for frequently accessed data with deterministic timing.
int_stack_dtcm: Dedicated fast memory for the stack to ensure reliable execution.
int_sram: General-purpose SRAM for variables, buffers, and heap.
int_sram_fls_rsv: Reserved SRAM for flash-related operations.
int_sram_no_cacheable: SRAM region excluded from caching, ideal for DMA or peripherals.
int_sram_results: Small reserved area for storing diagnostic or test results.
int_sram_shareable: Memory region intended for shared data, even in single-core use.
ram_rsvd2: Marker indicating the end of the SRAM address space.

You can may change memory segment's addresses and sizes but it is needed to keep in mind boundaries given by memory resources.

[Hareesh_S]

Hello,
Thank you for response.
So to clarify, am I right in saying there is no practical limitation on any of the SRAM segments and that I could theoretically group the whole 96KB into a single SRAM segment?

[davidtosenovjan]

I would recommend not to change used segments anyhow. You can use size of 0 in case it is not used anyhow.

[Hareesh_S]

I do not intend on changing them, my question is merely to understand if there is a hard, physical limitation/difference between the different SRAM sections. Additionally, regarding the int_sram_shareable section, can you explain what "shared data" means in this case? Shared between what?

Much thanks for the clarification thus far!

[davidtosenovjan]

It is rather generic for all S32K3 derivatives, so it is for sharing data between cores.

Possibly it can be used it data are shared between core and other XBAR master as DMA or other. It could be certain AUTOSAR requirement - I am not completely sure.

[Hareesh_S]

Ohhokay understood.
Much thanks for the clarification