S32K311_LQFP - ADC Mux Output channel configuration

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S32K311_LQFP - ADC Mux Output channel configuration

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truptikavadi1
Contributor I

Hi,

I want to configure pin ADC1_MA[0] which is given as ADC mux output type.

1. Can I know the registers to read the ADC raw value for the above mentioned pin.

2. Can I know the steps to configure this as an ADC channel.

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

ADC_MA[n] are output pins driven by ADC. Each ADC provides three external decode signals (MA) to be used to select one channel (out of a maximum of eight) from external analog multiplexer(s). There can be maximum four of such multiplexers which are used to connect the 32 external channels. Each MUX output is to be connected to an external input (“X”) pin.
Depending on the External channel selected for conversion, the MA outputs are set by ADC and the corresponding “X” pin is sampled, and the result is stored in the ADC data register for selected external channel
Note: ADCx_MA is grey coded so it doesn’t count sequentially from 0 to 7. It counts 0, 1, 3, 2, 6, 7, 5, 4.
Below is mapping for external channel selection register, data register and ADC input.

PetrS_0-1750160784862.png

You can simply test external channel sampling without ext analog mux connected, for example select ch72 to be sampled, you should have input signal connected to ADCx_X1 input, finally result should be read from CDR72 register.

BR, Petr

 

 

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