S32K3 - PIT Clock

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ssean
Contributor IV

Hello.

I am testing the Iseled example code.
PIT_0 and PIT_1 are connected to AIPS_SLOW and run at a 30 MHz clock.
Why is the GptChannelTickFrequency from the GPT module outputting as 60 MHz?

ssean_0-1746768846965.png

ssean_1-1746768857304.png

ssean_2-1746768864041.png

 

BRs,

Sean Sung

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Sean,

You need to use McuClockReferencePoint_1

danielmartynek_0-1747120328277.png

How is GptClokcReferencePoint_0 configured in GptDriverConfiguration?

danielmartynek_1-1747120394800.png

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Sean,

You need to use McuClockReferencePoint_1

danielmartynek_0-1747120328277.png

How is GptClokcReferencePoint_0 configured in GptDriverConfiguration?

danielmartynek_1-1747120394800.png

 

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ssean
Contributor IV

Hello @danielmartynek 

I made mistake that.

I was able to solve it using the method you suggested.

 

BRs,

Sean Sung

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @ssean,

The ClockReferencePoint is configured in the MCU driver:

danielmartynek_0-1746775376540.png

danielmartynek_1-1746775453582.png

 

By the way, there is no clock option with CORE_CLK = 60MHz (RM, Section 24.7.2 System clocking configurations).

We recommend using one of the clock options.

At least the ratios between the clocks must be set to one of the clock options.

danielmartynek_2-1746775659713.png

 

Regards,

Daniel

 

 

 

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ssean
Contributor IV

Dear @danielmartynek 

There is no reference point for AIPS_SLOW_CLK in ISELED example project.

So I added like below.

ssean_0-1747004887290.png

 

The GptChannelTickFrequency of the GPT module is still outputting 60 MHz.
Shouldn't the GptChannelTickFrequency of the GPT and PIT modules be based on the AIPS_SLOW clock?
What configuration determines this output frequency?

 

I have already reviewed the use of the 60 MHz Core Clock.

https://community.nxp.com/t5/S32K/S32K312-Core-Clock/td-p/1978738

 

Is there any invalid setting value in my configuration?

 

BRs,

Sean Sung.

 

 

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Sean,

The ratios between the clocks seems to match this option: RM, Table 161. Option F - Operation in 1:1 mode with CORE_CLK and AIPS_PLAT_CLK at same speed.

However, can you use CLKOUT_RUN to confirm it?

danielmartynek_0-1747036771647.png

 

Regards,

Daniel

 

 

 

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ssean
Contributor IV

Hello @danielmartynek 

 

Is this setting related to the Gpt module's GptChannelTickFrequency output?
Could you check the GptChannelTickFrequency first?

 

Clock setting is below.

ssean_0-1747091962121.png

ssean_1-1747091979468.png

 

BRs,

Sean Sung

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