In the S32K3 Reference Manual, I can read:
DMAMUX_0 and DMAMUX_1 channels are mapped to eDMA_TCD 0–5 and 6–12, respectively.
This can be valid for S32K312, which includes 12 TCD descriptors.
As far as I can see, any other S32K device (S32K322/S32K342/S32K314/S32K324/S32K344) has 32 TCD in total, and in fact it also has 16 channels per DMAMUX instance. In all these devices, which is the mapping between the DMAMUX channel and the TCD? Is it simply 1:1 ?
DMAMUX_0 - TCD0-15
DMAMUX_1 - TCD16-31
Thank you for your feedback
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Yes, you are right. It should be stated that
DMAMUX_0 and DMAMUX_1 channels are mapped to eDMA_TCD 0–15 and 16–31, respectively.
excluding S32K312 where
DMAMUX_0 and DMAMUX_1 channels are mapped to eDMA_TCD 0–5 and 6–12, respectively.
Thank you for your findings. I will report it as documentation bug.
Yes, you are right. It should be stated that
DMAMUX_0 and DMAMUX_1 channels are mapped to eDMA_TCD 0–15 and 16–31, respectively.
excluding S32K312 where
DMAMUX_0 and DMAMUX_1 channels are mapped to eDMA_TCD 0–5 and 6–12, respectively.
Thank you for your findings. I will report it as documentation bug.