S32K3 DMA use of ADC Error

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S32K3 DMA use of ADC Error

1,053 次查看
LewisThin
Contributor III

dear experts:

i sue S32K344 to config ADC with DMA, but error occurs after initialed.

the configuration is show below

LewisThin_0-1756439754483.png

LewisThin_1-1756439764585.png

LewisThin_2-1756439796720.png

LewisThin_4-1756439844529.png

 

i just config ADC2 with DMA using instance0 channel0 with scater mode

 

after initialed , when OS start first task, an error intterrupt occurs.

in this moment , i did not run any adc conversion task.

LewisThin_5-1756439990637.png

 

can any body give me some ways to investigate the issue ?

 

 

 

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1,018 次查看
PetrS
NXP TechSupport
NXP TechSupport

Hi,

settings in screenshots look correct. Maybe you can check scatter-gather configuration with respect of driver user manual, to have right number of SG elements and proper linking of those.
Anyway, DMA SBE error may happen in case source address points to memory range that is inaccessible - it means either access to reserved memory space or to disabled or un-clocked peripheral or protected by any kind of protection leading in bus error (MPU, XRDC).

BR, Petr

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LewisThin
Contributor III

hi,PetrS,
thanks for your reply. I found sth that maybe useful for the issue. for the performance, i changed the ld file and put *(.mcal_bss_no_cacheable) into DTCM. so, the variables in dma_ip_pbcfg.c were placed into DTCM.

LewisThin_0-1756518602628.png

 

if i place them back to no_cacheable sram, the DMA can work correctly.

LewisThin_1-1756518674703.png

but i have changed the MPU setting , the AP of DTCM region is 011

LewisThin_2-1756519724850.pngLewisThin_3-1756519741135.png

and i did not found any description which the DMA can not access the DTCM

 

can you give me  more advice?

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

DMA can access DTCM via backdoor access, not through the core-coupled path. This access is slower and non-deterministic compared to core access. DMA uses the AHB slave interface to reach DTCM, which is part of the system bus architecture. See AN13388 chapter 4. Tightly Coupled Memory for more info; https://www.nxp.com/webapp/Download?colCode=AN13388&location=null
So question could be if it brings any benefit in your application and if rather keep DMA accessed data in normal SRAM.

BR, Petr

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877 次查看
LewisThin
Contributor III

hi,PetrS:

thanks for your reply. i will try to change the mcl_memap.h and ld file to keep the variables used by DMA in sram.

but i really want to find out why the current code can not work correctly. the reuslt buffer used by Adc_SetupResultBuffer is in DMA, but i used the backdoor to access.

LewisThin_0-1757042417343.png

but the error of DMA is SBE not DBE

LewisThin_1-1757042446989.png

and the source address is determined by adc

LewisThin_2-1757042581452.png

is there any other method to solve this?

 

best regards!

 

 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes in case of result buffer access error the DBE should be set. 
Here most probably the SBE error comes when DMA is reading new TCD if Scatter-Gather is used. If TCDs are put in DTCM as well, its SG Address should also use backdoor offset.

BR, Petr

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LewisThin
Contributor III

hi, PetrS

bad news. i have chagned the ld and mcl_memmap.h fils. the dma related variables were placed into non-cachable sram, the result buffers  were in dtcm and were accessed by backdoor, but the error was as before.  

LewisThin_0-1757063951916.png

 best regards!

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

last tip...check TCD content at time of error, if there are expected values.

BR, Petr

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