Hi,
I counfig LPSPI1 as slave, LPSPI0 as master ,and LPSPI0 transfer data to LPSPI1,and LPSPI1_AUTOPCS bit is set, TCR[CPHA]=1.The SCK(LPAPI0 produce )remain more than 4 LPSPI clock cycle between word. But when i do not connect LPSPI0_PCS0 to LPSPI1_PCS0, the transfer between LPSPI0 and LPSPI1 is failure,LPSPI1 can't receve data which from LPSPI0.
Whether my understand correctly about ? : LPSPI1_AUTOPCS = 1,and TCR[CPHA]=1,andThe SCK(LPAPI0 produce )remain more than 4 LPSPI clock cycle between word. If the above conditions are met,Even if the LPSPI1_PCS0 not connect to LPSPI0_PCS0,LPSPI can receve data from LPSPI0.
ooking forward to your reply!