S32K148 - EWM_OUT_b pin

[matej_15]

Hi!

If you could please help us regarding EWM_OUT_b pin of the External Watchdog Monitor on S32K148 SMCU.

We are not sure if this pin is in push-pull or open drain configuration and is it active high or active low?

Our current idea is to connect EWM_OUT_b to the SMCU RESET_b pin so in case EWM triggers it would reset the SMCU. This would serve as a redundancy watchdog monitor to the internal watchdog monitor. Do you see any reason not to use this configuration?

Best regards,

Matej

[matej_15]

Hi @Robin_Shen,

thank you for the answer! Yes, by SMCU (Safety MCU) we mean S32K148. 

Actually, the idea was not to use external pull down resistor on EWM_OUT_b. It is clear that the EWM would not reset MCU's CPU and peripherals on its own. The idea was that EWM_OUT_b signal externally triggers the RESET_b as follows:

When the board is starting-up, the PG (active low) of 3V3 power supply is keeping the S32K148 in reset (RESET_b low). After the 3V3 boots-up, the PG goes high to 3V3 and SMCU exits reset state. S32K148 starts to power-up and we assume EWM_OUT_b goes high at that point and would not trigger the RESET_b since there is no external pull-down on EWM_OUT_b pin.
When EWM triggers, it will pull EWM_OUT_b pin low which would cause RESET_b to be triggered and reset S32K148. This would act as a redundancy to the internal watchdog module. Does this idea seems plausible? 

Best regards,

Matej

[Robin_Shen]

According to the S32K148_IO_Signal_Description_Input_Multiplexing.xlsx, EWM_OUT_b  is not available on PTC16.. EWM_OUT_b is available on those pins:

EWM_OUT_b	default	MUX
PTA2	ADC1_SE0	ALT4
PTA4	JTAG_TMS/SWD_DIO	ALT5
PTA17	DISABLED	ALT4
PTE4	DISABLED	ALT7

I don't think you will use PTA4, default JTAG_TMS/SWD_DIO(Weak pull-up enabled)
PTA17 and PTE4 default to DISABLED (high impedance)
PTA2 defaults to ADC1_SE0, refer to the data sheet Figure 14. ADC input impedance equivalency diagram

EWM_OUT_b goes high when set EWMEN bit in the CTRL register.

This is an issue on the application level. Please check if it meet the specification of RESET_b:

Best Regards,
Robin

[matej_15]

Hi @Robin_Shen ,

my apologies. The block diagram was taken from something else and I didn't update the pins. Here is the updated diagram:

PTA17 is used as EWM_OUT_b which is by default disabled (high impedance). 

I agree this is an issue on the application level, but as far as you're concerned, are you seeing any reason not to use EWM_OUT_b pin to reset the MCU via RESET_b terminal?

Best regards,

Matej

[Robin_Shen · Accepted solution]

I don't see an obvious problem, but it is still recommended that you measure the Reset_b waveform with an oscilloscope to ensure that this circuit meets the Reset_b requirements mentioned in Table 16.

[Robin_Shen]

Hi Matej,

push-pull and active low(There is a NOTE in S32K1XXRM: EWM_OUT_b pad must be in pull down state when EWM functionality is used and when EWM is under Reset.)

The EWM differs from the internal watchdog in that it does not reset the MCU's CPU and peripherals. To reset the MCU, you need either the internal WDOG module or an external one like an SBC.

Does SMCU mean S32K148? If you connect EWM_OUT_b and external pulldown, low voltage at RESET_b will always reset S32K148.

Best Regards,
Robin
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