S32K148 CAN receiver without filtering

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S32K148 CAN receiver without filtering

943 Views
Contributor III

Hello,

I'm trying to implement a CAN receiver that accepts all CAN messages (all IDs without filtering). With my current software I'm able to transmit CAN messages, but can only receive CAN messages for which I specify the ID in the receive Message Buffer (MB).

void FLEXCAN0_Init(void)

{

   // CLK for FlexCAN.
    PCC->PCCn[PCC_FlexCAN0_INDEX] |= 0x1 << 30 /* CGC */;
    
    // Deactivate FlexCAN module.
    CAN0->MCR |= 0x1U << 31 /* MDIS */;
    
    // CAN Protocol Engine CLK source set to SOSCDIV2_CLK.
    CAN0->CTRL1 &= ~(0x1 << 13 /* CLKSRC */);
    
    // Activate FlexCAN module. Also sets FRZ and HALT flags.

    CAN0->MCR &= ~(0x1U << 31 /* MDIS */);
    
    // Wait for FRZACK.
    while ((CAN0->MCR & (0x1 << 24 /* FRZACK */)) == 0x0) { ; }

   // Setup bit timing for 500 kbps CAN.

   CAN0->CTRL1 = 0x3 | 0x2 << 16 | 0x7 << 19 | 0x2 << 22;

   // Clear all MBs.

   for (i = 0; i < 128; i++)
    {
        CAN0->RAMn[i] = 0x0;
    }

   // Deassert all individual mask bits for all MBs.

   for(i = 0; i < 16; i++)
   {     
      CAN0->RXIMR[i] = ~(0xFFFFFFFF);
   }

   // Setup MBs 4 and 5 to receive Standard ID CAN messages.

   for (int i = 4; i < 6; i++)
   {
       CAN0->RAMn[i * 4 + 0] = 0x4 << 24 /* CODE = 4 - MB is empty and free to receive. */;
   }
 

   // Setup MBs 6 and 7 to receive Extended ID CAN messages.
   for (int i = 6; i < 8; i++)
   {
        CAN0->RAMn[i * 4 + 0] = (0x4 << 24) /* CODE = 4 - MB is empty and free to receive. */ | (0x1 << 21) /* MB to receive extended IDs. */

    }

   // Last MB used is MB7.

   CAN0->MCR = 0x7;

   while ((CAN_MCR_FRZACK_MASK && CAN0->MCR) >> CAN_MCR_FRZACK_SHIFT)  {}

   while ((CAN_MCR_NOTRDY_MASK && CAN0->MCR) >> CAN_MCR_NOTRDY_SHIFT)  {}

}

Using this FlexCAN configuration I'm not able to receive any message. If I specify a message ID into a MB set to receive, than I receive this message with no problems. But I want to shut down the filtering function entirely so that I can receive CAN messages with any ID.

5 Replies

95 Views
NXP TechSupport
NXP TechSupport

Hi Tomas,

as Ana wrote, clear the Mask register.

If MCR[IRMQ] is set then clear RXIMR[4] to RXIMR[7]

if MCR[IRMQ] is cleared then write zero to RXMGMASK.

BR, Petr

95 Views
Contributor III

Hello, Petr,

After deleting the deasserting of the individual RXIMR registers and simply setting the RXMGMASK to 0x0, the reception now works as expected. The MCR[IRMQ] wasn't modified (default is 0).

Thanks!

0 Kudos

95 Views
NXP Employee
NXP Employee

Hello,

You can implement a receiver without filtering using the S32 SDK for S32K148.

Please follow this example code:

/*Initialize the FlexCAN module */

 FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);

/* Enable message buffer global masking */

FLEXCAN_DRV_SetRxMaskType(INST_CANCOM1, FLEXCAN_RX_MASK_GLOBAL);

/* Set the global mask as "don't care" for each message buffer */
FLEXCAN_DRV_SetRxMbGlobalMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, 0U);

flexcan_data_info_t dataInfo =
{
.data_length = 8U,
.msg_id_type = FLEXCAN_MSG_ID_STD,
.enable_brs = false,
.fd_enable = false,
.fd_padding = 0U
};

/* Configure message buffer 0 for reception */

FLEXCAN_DRV_ConfigRxMb(INST_CANCOM1, 0U, &dataInfo, MSG_ID);

/* Start receiving data in message buffer 0 */

FLEXCAN_DRV_Receive(INST_CANCOM1, 0U, &recvBuff);

/* Wait for the reception to end */
while(FLEXCAN_DRV_GetTransferStatus(INST_CANCOM1, RX_MAILBOX) == STATUS_BUSY);

95 Views
Contributor III

FLEXCAN_DRV_ConfigRxMb(INST_CANCOM1,0U,&dataInfo,MSG_ID);

What is the MSG_ID for?

95 Views
NXP TechSupport
NXP TechSupport

MSG_ID specify the ID programmed into given MB, here MB0. MB ID is compared with the received one using mask.

There is bit2bit correspondence between received ID, mask and programmed MB ID. The mask says if corresponding incoming ID bit is compared with programmed ID bit.

If mask bit is cleared the incoming ID bit is not compared, it is don’t care. If mask bit is set, then there must be exact match between incoming ID and programmed ID. To receive a message into a MB all bits with mask bit set must be equal to programmed one.

BR, Petr