I'm working with S32K146 controller and having trouble with FTM4.
I'm initialize the timer in counter mode and after start CNT register change value from 0 to 65535 in a circle.
Now I want to configure interrupt when CNT register change value from 65535 to 0.
I set TOIE bit in SC register
FTM4->SC |= FTM_SC_TOIE_MASK;
and set interrupt enable in NVIC
S32_NVIC->ISER[FTM4_Ovf_Reload_IRQn / 32] |= (1 << (FTM4_Ovf_Reload_IRQn % 32));
I also add interrupt handler function:
FTM4->SC &= ~FTM_SC_TOF_MASK;
Vector Table in startup file have corresponding pointer to my handler
.long FTM4_Ovf_Reload_IRQHandler /* FTM4 Counter overflow and Reload interrupt*/
But, CNT register overflow triggered DefaultISR handler.
I stop debugger and see programm stay in DefaultISR function located at 0x1065c in code memory.
At this time register xPSR = 0x21000090. FTM4_Ovf_Reload_IRQHandler located at 0x0134ad. Vector table offset VTOR = 0x10200. Code memory 0x10440 (corresponding to the interrupt vector 0x90) store word 0x1034AD.
The most intresting, when I change in my code FTM4 to FTM0 or FTM1 the trouble goes away
FTM0 or FTM1 worked nice!
FTM2-FTM5 dotn work.
Why? Help me!
Yes, it must be aligned.
Please take a look at ARMv7-M Architecture Reference Manual
B1.5.3 The vector table