S32K144 VLPS to RUN transition LPUART issue

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S32K144 VLPS to RUN transition LPUART issue

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rmelizalde
Contributor I

Hello all,

We have an application in which the micro is awakened from deep sleep (VLPS) by a falling edge interrupt in UART RX pin.

The problem is that apparently the first bit is lost, so we get a corrupted reception.

The baudrate is set to 115200. We think that lowering down the baudrate to 57600 should fix/improve the problem. But unfortunately this is not an option right now.

We have observed so far:

- When we disable deep sleep, the transition from VLPR run mode to RUN works just fine. From this, we are assuming that this transition takes less time and this is why the LPUART is able to sample the first bit correctly

- So, we decided to change the clock source of LPUART from SOSCDIV2 to SIRCDIV2. Our understanding is that SIRCDIV2 is also available in VLPS (I've checked that this clock is enabled for low power mode). Our expectation here was that the transition time from VLPS to RUN was not important anymore, because we expected the LPUART to keep working while in VLPS. So the reception should be just fine independenlty of in which mode the MCU is (VLPS or RUN)

However, it is still not working. Apparently, having the SIRCDIV2 as the clock source for LPUART does not solve our problem.

So, our question at this point would be if the LPUART can work in VLPS, so if our assumption is right that having the SIRCDIV2 as the clock source should make this work.

And more importantly, if anybody can help to have this working. Which is: the micro in VLPS awakened by LPUART reception, without loosing the first byte. Currently, the micro is awakened by falling edge interruption in LPUART RX line. I know that maybe also the LPUART RX interrupt should work as the wakeup source. But we currently have the falling edge in the RX pin.

Thanks a lot in advance.

Ricardo

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Ricardo,

The S32K14x NVIC supports 16 priority levels.

Could you share the configuration of the NVIC and the core registers?

I tested the the RXEDGIF interrupt in VLPS at 115200 bsp and it seems to be working correctly.

My test code is attached.

It echoes received data and goes to VLPS whenever an 's' character is received.

pastedImage_1.png

pastedImage_2.png

Regards,

Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Ricardo,

By the edge interrupt, do you mean a PORT interrupt or the RXEDGIF flag LPUART interrupt?
It should work with the LPUART interrupt in VLPS while the module is clocked by SIRC.

pastedImage_1.png

Thanks,
BR, Daniel

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rmelizalde
Contributor I

Hello Daniel,

We have not been successful to wake up the micro with RXEDGIF interrupt.

What we are doing so far:

1) Configure SIRCDIV2 as 8MHz and enabled in low power and stop

2) Set LPUART0 baudrate to 115200

3) Set LPUART0 RXEDGIE in BAUD register

4) Set LPUART0 interrupt priority to 64 (NVIC id 31)

5) When going to sleep, we set basepri to 96.

With this configuration we can see that when the micro is in RUN mode, the UART communication works correctly.

However, when we put the micro to sleep (here we set basepri to 96), the micro won't wakeup at all when receiving UART data. Please not that it was waking up correctly with the PORT interrupt with falling edge.

But it is not waking up with the RXEDGIF interrupt.

What are we missing here?

Thanks  a lot in advance.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Ricardo,

The S32K14x NVIC supports 16 priority levels.

Could you share the configuration of the NVIC and the core registers?

I tested the the RXEDGIF interrupt in VLPS at 115200 bsp and it seems to be working correctly.

My test code is attached.

It echoes received data and goes to VLPS whenever an 's' character is received.

pastedImage_1.png

pastedImage_2.png

Regards,

Daniel

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rmelizalde
Contributor I

Thank you very much, Daniel, for your help

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