The flash memory is not writable by the core itself but by the FTFC module.
The core can only write the FTFC registers and launch a command such as the Program Phrase command.
Flash protection can be used instead, please refer to the reference manual:
36.5.1 Flash protection.
188.8.131.52.9 Data Flash Protection Register (FDPROT).
The FDPROT register is loaded from the flash configuration field during the reset sequence.
Thanks for the insight.
The application we are seeking is to lock and unlock flash region in during execution.
As from the RM it can be understood that write protection provided by flash protection module
is irreversible.i.e once write protect will stay until reset.
Is there any way we can protect flash memory via System MPU.
Is it possible to use Arm provided MPU?
I’m sorry for the delayed response.
The Arm M4 core version in this family does not integrate the Arm Core MPU.
One possibility is to write-protect the FTFC registers when needed.
The peripherals (including FTFC) cannot be protected by the MPU but the Bridge provides some protection.
You can therefore write-protect the FTFC module in the AIPS_OPACRA[WP0] register.