S32K144 SPI ISSUE

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S32K144 SPI ISSUE

2,193 Views
raviranjankumar
Contributor III

Hi,

I am working on SPI Driver in S32k144 EVB. I want to write data in EEPROM (M95320) which supports SPI communication. We already worked on this EEPROM with other controller. We ported same code into S32k144. I am using S32K SPI example code. I am using PCS3 pin for chip select. The data is not writing into EEPROM, even it is not showing in TDR register also.

This is the code how I intialize the Master Communication

void LPSPI1_init_master(void)

{
      PCC->PCCn[PCC_LPSPI1_INDEX] = 0; 
      PCC->PCCn[PCC_LPSPI1_INDEX] = 0xC6000000; 

      LPSPI1->CR = 0x00000000; 
      LPSPI1->IER = 0x00000000; 
      LPSPI1->DER = 0x00000000;
      LPSPI1->CFGR0 = 0x00000000;

      LPSPI1->CFGR1 = 0x00000001;

      LPSPI1->TCR = 0x5300000F; 

      LPSPI1->CCR = 0x04090808;

      LPSPI1->FCR = 0x00000003; 

      LPSPI1->CR = 0x00000009; 
}

I am configuring SIN in Input Mode, SOUT in Output Mode, SCK in Output Mode, PCS3 in Ouptut.

Anyone please help me as soon as possible.

Thanks & Regards,

Ravi Ranjan 

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6 Replies

470 Views
esaias_pech
Contributor I

Sorry for hijacking the thread, but is there any information on using the NXP-provided drivers in half-duplex mode? (3-wire SPI)?

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

LPSPI1_PCS3 is already used for SBC chip select on S32k144 EVB. Please use another PCS for the EEPROM.

 

Data that has been written to TDR are not visible in this register. This register is write only. The data are immediately pushed into transmit FIFO.  FSR[TXCOUNT] returns the number of words currently stored in the transmit FIFO.

 

What do you mean with Input Mode/Output Mode? This pins should be configured for SPI which is their alternative function.

 

Regards,

Daniel

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raviranjankumar
Contributor III

Hi Daniel,

Thanks for replay.

I used PCS0 for EEPROM. When I am writing data into EEPROM, the TXCOUNT in FSR is showing 0. When I read EEPROM I am getting garbage data. I configured all pins in Alternate function3. Any further changes I have to do in Master Init to write data into TDR register.

Thanks & Regards,

Ravi Ranjan

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi Ravi,

 

I have noticed your SPI configuration is taken directly from the example in Design Studio. This example was written for SBCs MC33903, UJA1169. The EEPROM may require different configuration (clock polarity and phase (TCR), chip select polarity (CFGR1)...).

 

If the transmit FIFO is empty, it means all data have been already sent out. You should be able to see them on scope.

 

Regards,

Daniel

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raviranjankumar
Contributor III

Hi Daniel,

Thanks for Replay.

The EEPROM is work with POL = 1 and PHASE = 0,  and POL = 0 and PHASE = 1, I tested with this both, but data is not written. In scope also I am unable to see the data.

Can you tell me the General Master Initialization procedure for S32K?

Can you tell me the difference between PCS0 to PCS3?

Thanks & Regards, 

Ravi Ranjan 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

I would recommend to configure the SBC (requires 12V supply voltage) with the SPI example to get an understanding of the SPI module. This example is functional and shows master mode initialization.

The PCS0 must be selected in TCR[PCS] register. But regardless of the PCS configuration, the master should transmit data on SOUT pin.

Regards,

Daniel

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