Hi community members,
I configure RGD1 to protect Flash memory from core read and write(use FTFC).
Following is the profile i have initialized MPU with.
MPU->RGDAAC = MPU_RGDAAC_M1UM(0x7) | MPU_RGDAAC_M1SM(0x3) | MPU_RGDACC_M0SM(0x3);
MPU->RGD.WORD0 = 0x77000;
MPU->RGD.WORD1 = 0x7801F;
MPU->RGD.WORD2 = MPU_RGD_WORD2_M1UM(0x7) | MPU_RGDAAC_M1SM(0x3) | MPU_RGD_WORD2_M0UM(0x0) | MPU_RGD_WORD2_M0SM(0x3);
MPU->RGD.WORD3 = MPU_RGD_WORD3_VLD(1);
(1) - then read:
tmp = *((uint32_t *)0x77000);
(2) - and then use FTFC command erase 0x77000 and write to 0x77000
BusFault will happen after (1), but MPU->CESR[SPERR2] been set not MPU->CESR[SPERR0].
No Busfault( or HardFault) will occur after (2).(I use debugger watch the address, it has been changed.)
Regarding the first question, the description is not complete, please share the project or at least complete MPU initialization code.
The MCU can't prevent programming the flash, because the core does not write the flash directly, it programs the flash using the FTFC controller.