S32K144 LPSPI getting stuck in "void LPSPI1_transmit_16bits (uint16_t send)" function

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S32K144 LPSPI getting stuck in "void LPSPI1_transmit_16bits (uint16_t send)" function

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Contributor III

S32K144 LPSPI getting stuck in "void LPSPI1_transmit_16bits (uint16_t send)" function

I tried debugging LPSPI code from example projects.

When i started debugging, the transmit function executes 8 times without any interruption, then it gets stuck  in 

"void LPSPI1_transmit_16bits (uint16_t send)" function in LPSPI.c

  • I used a global variable and incremented it after "void LPSPI1_transmit_16bits (uint16_t send)" function. The variable value never exceeded 8. After transmit function executes 8 times, it gets stuck in  while((LPSPI1->SR & LPSPI_SR_TDF_MASK)>>LPSPI_SR_TDF_SHIFT==0); in transmit function.
  • I tried giving slight delay after it transmits each time, but the issue remains same.
  • I haven't used any interrupts.

Please provide solution for this.

Regards,

Pritam.

PS: 

update, i have attached project zip file to this.

You can find same code in example projects for S32K144 in S32DS.

1 Solution
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NXP TechSupport
NXP TechSupport

Hi Pritam,

Thank you for the code.

You can either read the receive data register (RDR) or set the CFGR1[NOSTALL] bit in the SPI init function.

Please refer to the description of the bit.

Regards,

Daniel

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5 Replies
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NXP TechSupport
NXP TechSupport

Hi,

Can you share a test code?

Thanks,

Daniel

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Contributor III

Sure Daniel.. 

Please find the attached zip file of project attached to the original question.

You can also find this code in example projects in S32DS for K144 series.

Regards

Pritam

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106 Views
NXP TechSupport
NXP TechSupport

Hi Pritam,

Thank you for the code.

You can either read the receive data register (RDR) or set the CFGR1[NOSTALL] bit in the SPI init function.

Please refer to the description of the bit.

Regards,

Daniel

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Contributor III

Hi Daniel,

 

Sorry to bump an old topic like this. I have also run into the problem that when Rx-FIFO overflows, transmit stalls. Setting NOSTALL=1 solves this problem. However, NOSTALL=1 is not described to have any effect on Rx-FIFO overrun in RM 12.1.

 

I came here originally to see if this behaviour is guaranteed, even though it is undocumented. I searched the forum and found your proposal. Can I take this to mean that NOSTALL also has a guaranteed effect on allowing transfers after RX overrun, and is not an errata?

 

Kind regards,

Joey

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Contributor III

Thanks a lot Daniel... It actually worked..

:smileyhappy::smileyhappy::smileyhappy:

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