Hi guys,
I want to partition the FLASH of my s32k144 evaluation board, in order to activate the EEE functionality. I want a configuration with all the FlexNVM used as E-Flash.
I have some questions on the "flash_partitioning_s32k144" example provided with the SDK.
Proceeding in order, the program makes the following steps:
- Clock on the device
- Disable cache to guarantee instantaneous flash operations (is this necessarious? (1))
- Install the interrupt for flash command complete event, enable it along with the global interrupt event
- Initialize the driver
- Then it starts with the partitioning phase. As it is written in AN11983:
Before launching the program partition command the FlexNVM and D-flash IFR must be in an erased state. It is recommended that a new device is partitioned as the first step in factory programming.
Here, I've a question about the terminology used. As I understand from AN11983, the s32k1xx devices have the P-Flash memory and the FlexNVM memory. The FlexNVM memory can be configured as D-Flash, E-Flash or a combiantion of both. So, when the document says "FlexNVM and D-Flash IFR must be in an erased state", do you need to erase only the FlexNVM memory? (2) (IFR = nonvolatile Information Register found in each flash block, separate from the main memory array)
- Turning back to the code example, it erases both P-Flash and FlexNVM memories. It can do that because the code is charged directly in RAM, but this is impossible for me since my code should be stored on the Flash memory, thus I can't erase the P-Flash memory. What I have to do in order to erase only the FlexNVM memory? When I place the code directly in Flash, is FlexNVM automatically erased? (3).
- After the erasing, the code proceeds with the "Reprogram of secure byte in Flash configuration field":
uint8_t unsecure_key[FTFx_PHRASE_SIZE] = {0xFFu, 0xFFu, 0xFFu, 0xFFu, 0xFEu, 0xFFu, 0xFFu, 0xFFu};
.......
address = 0x408u;
size = FTFx_PHRASE_SIZE;
ret = FLASH_DRV_Program(&flashSSDConfig, address, size, unsecure_key);
If I understood, you can protect your Flash from external accesses via debug, by programming the FSEC[SEC] field. When this security is enabled, you can only launch mass erase operations and have no access to memory locations.
Here, we're writing the "Program flash protection bytes", i.e., the P-Flash Protection Registers (FPROT 0-3).
These registers define which P-Flash regions are protected from program and erase operations. Such regions can't be programmed/erased. So we put all FPROT bits at 1 (0xFFu), so we are not protecting any P-Flash region (1 = no protect, 0 = protect).
- Now, the code finally can perform the partitioning. It configure FlexRAM as EEPROM and FlexNVM as EEPROM backup region (the whole FlexNVM is used as E-Flash).
- It erases a portion of P-Flash memory
- "Verify the erase operation at margin level value of 1" What is it the margin level? (4)
- It writes some data in the previusly erased P-Flash region
- It writes on the Emulated EEPROM:
uint8_t sourceBuffer[BUFFER_SIZE] = { .... }; // BUFFER_SIZE = 0x100u
........
address = flashSSDConfig.EERAMBase;
size = sizeof(uint32_t);
ret = FLASH_DRV_EEEWrite(&flashSSDConfig, address, size, sourceBuffer);
Why does it pass the size of an uint32_t? (5) Maybe it is writing the first 32 bit of the sourceBuffer in the EEPROM.
- At this point, the code erases a block of D-Flash
- Invoke the FLASH_DRV_VerifySection, that verifies the "erase operation at margin level value of 1, user read". What is it the margin level? (same as 4)
- It writes some data to the erased D-Flash sector
- Invoke the FLASH_DRV_ProgramCheck, that verifies the "erase operation at margin level value of 1, user margin". What is it the margin level? (same as 4)
Moreover, I would ask some other questions:
- how EEE erasing is performed?(6)
- the code configured the whole FlexNVM as EEPROM backup. With this configuration, is it true that the system does not have any D-Flash available? (7)
- in the code documentation there is written:
The FlexNVM memory is partitioned to EEPROM use and is blocked for some erase commands (Erase Sector and Erase Block). As a consequence, loading the program to flash memory may fail on some debuggers. Please perform a mass erase operation on Flash to remove this partitioning after running the example to be able to update your application on target.
I didn't understand if it is the use of the Emulated EEPROM to make impossible to erase the FlexNVM memory, or it is because of some inner/hide setting in the code. (8)
How do I perform a mass erase operation with s32k144 and s32 design studio? Can you describe me the precise steps to do that, without risking to brick my board as happened for other people, like here? (9)
Thank you all in advance,
bye.
Hi,
To your questions:
1.
It's on users' responsibility on such a cache system to invalidate the cache when the original memory contents were modified. Once the P-flash or D-flash modifications were completed, users can enable the prefetch buffers again.
2.
D-Flash IFR has to be erased. The Program Partition command erases the contents of the FlexNVM memory (Section 36.5.11.14 RM rev.7).
3.
Just place the function that launches the Program Partition command into RAM and wait there until the command is complete.
4.
Erased Flash cells are read as “1” and programmed as “0” and the Margin level is basically the threshold of the reading. Some of the cells might be weakly programmed or erased. To check if the Flash has been erased or programmed properly, the Margin level can be adjusted. So, a read with 1s Margin will be more sensitive to weakly erased cells and 0s Margin to weakly programmed cells. You can refer, for instance, to AN3419 System Integrity Techniques for the S12XE, Chapter 3.
5.
In this case, it writes the EEPROM data in 32-bit steps.
Function FLASH_DRV_WaitEEWriteToFinish in flash_driver.c
6.
It works like FlexRAM.
7.
Yes
8.
Yes, when the data flash is targeted, DEPART must be set for no EEPROM (see FlexNVM partition code) else the Erase Flash Block command aborts setting the FSTAT[ACCERR] bit (Section 36.5.11.5).
9.
Can you please post the question on S32 Design Studio community?
Regards,
Daniel
