S32K144/146: Alternatives for back to back ADC conversion, when using all ADC0 channels

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S32K144/146: Alternatives for back to back ADC conversion, when using all ADC0 channels

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francisco_rico
Contributor I

Hello,

It is my understanding, per 

S32K1XXRM rev 12.1 page 171 "This bit field [PDB_BB_SEL_2, PDB_BB_SEL_1] is ... Reserved and Read-Only Zero for S32K14x"

and

S32K144 ADC 

that only 8 ADC0 channels with PDB0 can be used in back to back mode for S32K144 and S32K146, thus option PDB_BB_SEL_2/SIMCHIPCTL[23]=0

PDB_BB_SEL_1/SIMCHIPCTL[22]=1

PDB_BB_SEL/SIMCHIPCTL[13]=X

is not supported.

What is then the alternative to use, considering throughput usage and responsiveness? Or (least preferred option) should the PCB be modified to use only 8 ADC0 channels and the remaining from ADC1?

Note: software trigger is selected as the trigger input source.

Thanks,

JR

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

back-to-back conversion on PDB0 channel 1 can be used too, but the first channel 1 pretrigger must be delayed so previous chain conversions on channel 0 is finished, thus all 16 channels on ADC0 can be triggered/converted.

See more e.g. in https://community.nxp.com/thread/527073 

BR, Petr

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