S32K11x - SM_119

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S32K11x - SM_119

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Catosh
Contributor IV

Hi all, 

about [SM_119]:" The Flash memory ECC failure reporting path should be checked to validate if detected ECC faults are correctly reported. [end]"

The implementation hint :"The flash memory ECC fault report check is executed in software".

 

I would like to understand what does the implementation hint mean. 

In my application I enable the double bit fault detect interrupt and then I force an ECC error:

FTFx_FERCNFG |= FTFx_FERCNFG_DFDIE_MASK;

FTFx_FERCNFG |= FTFx_FERCNFG_FDFD(1);

uint32_t tempvar = (uint32_t)*((uint32_t*)(0x4));// Reset vector address here

This triggers the ecc controller and generates the expected interrupt. In the FTFC_IRQHandler, i relocate the callback (so no more ECCs are generated) for checking if the ECC was a real error or a test.

In case of error if no FTFx_FERCNFG_FDFD(1) was present in FTFx_FERCNFG i enter in a safe state. 

 

is this considered a ECC fault report check or am I out of track?

K.R.

 

Luca.

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