Hello,
I'm currently working on the S32K116 Watchdog peripheral and I noticed that the SDK forces the watchdog configuration to enable the 32-bit writes at line 35 as shown below. When I read the manual, it said that it supports both 32-bit and 16-bit writes to unlock/refresh. Is there any reason that the watchdog configuration is always 32-bit enabled?
Regards,
Rui Almeida
status_t WDOG_Config(WDOG_Type * const base,
const wdog_user_config_t * wdogUserConfig)
{
status_t status = STATUS_SUCCESS;
uint32_t cs = base->CS;
bool tmp1 = WDOG_IsEnabled(base);
bool tmp2 = WDOG_IsUpdateEnabled(base);
INT_SYS_DisableIRQGlobal();
if ((tmp1 == false) && (tmp2 == true))
{
cs &= ~(WDOG_CS_WIN_MASK | WDOG_CS_PRES_MASK | WDOG_CS_CLK_MASK | WDOG_CS_INT_MASK |
WDOG_CS_UPDATE_MASK | WDOG_CS_DBG_MASK | WDOG_CS_WAIT_MASK | WDOG_CS_STOP_MASK);
cs |= WDOG_CS_WIN(wdogUserConfig->winEnable ? 1UL : 0UL);
cs |= WDOG_CS_PRES(wdogUserConfig->prescalerEnable ? 1UL : 0UL);
cs |= WDOG_CS_CLK(wdogUserConfig->clkSource);
cs |= WDOG_CS_INT(wdogUserConfig->intEnable ? 1UL : 0UL);
cs |= WDOG_CS_UPDATE(wdogUserConfig->updateEnable ? 1UL : 0UL);
if (wdogUserConfig->opMode.debug)
{
cs |= WDOG_CS_DBG_MASK;
}
if (wdogUserConfig->opMode.wait)
{
cs |= WDOG_CS_WAIT_MASK;
}
if (wdogUserConfig->opMode.stop)
{
cs |= WDOG_CS_STOP_MASK;
}
cs |= WDOG_CS_FLG_MASK;
cs |= WDOG_CS_EN_MASK | WDOG_CS_CMD32EN_MASK;
WDOG_UNLOCK(base);
while (!WDOG_IsUnlocked(base))
{
}
base->CS = cs;
base->TOVAL = wdogUserConfig->timeoutValue;
if (wdogUserConfig->winEnable)
{
base->WIN = wdogUserConfig->windowValue;
}
while (WDOG_IsUnlocked(base))
{
}
while (!WDOG_IsReconfigurationComplete(base))
{
}
}
else
{
status = STATUS_ERROR;
}
INT_SYS_EnableIRQGlobal();
return status;
}