I'm confused how the ADC module works on the S32K118.
The documentation says there is a result register for every channel, but there are more channels than result registers. On this part, there are only 16 result registers, but it is possible to select a channel such as the bandgap (channel 27).
In the Adc_Pdb_Ip example, the conversion results always appear in the first result register no matter which channel is selected. How can multiple channels be converted using the RTDs and have the results appearing in different result registers? For example, convert channels 0 to 2 and have the results appear in RQ to RS?
Solved! Go to Solution.
Hi,
RM states that "For every status and channel control register (SC1A:SC1n), there is a corresponding data result register." Writes to SC1A makes SW triggered conversion and result is always in corresponding data register RA.
If HW triggering is used by PDB then 16 available pretriggers correspond to SC1A:SC1P, thus to do multiple conversions you need to enable pretriggers in PDB and set corresponding SC1n registers for selected channel to be sampled, after conversion, result will be in respective data registers Rn.
So in the example you should add channels/pretriggers in PDB component, you can have up to 8 pretriggers for PDB channel. Back-to-back option can be selected for chained pretriggers so its delay can be omitted.
Then in ADC component add ADC channels as well
BR, Petr
This did work for me once I added the extra channels to the ADC and PDB:
Hi,
RM states that "For every status and channel control register (SC1A:SC1n), there is a corresponding data result register." Writes to SC1A makes SW triggered conversion and result is always in corresponding data register RA.
If HW triggering is used by PDB then 16 available pretriggers correspond to SC1A:SC1P, thus to do multiple conversions you need to enable pretriggers in PDB and set corresponding SC1n registers for selected channel to be sampled, after conversion, result will be in respective data registers Rn.
So in the example you should add channels/pretriggers in PDB component, you can have up to 8 pretriggers for PDB channel. Back-to-back option can be selected for chained pretriggers so its delay can be omitted.
Then in ADC component add ADC channels as well
BR, Petr