S32K dflash write issue with fls driver

[Shaun666]

Hello support，

I have a problem for S32K fls driver. I use the etas fee and nvm codes to the simulate eeprom, the dflash driver is fls from RTD. I see there are 4 same sector headers in the Dflash memory when the program initial.Normally ,only one sector header when the simulate eeprom has initial. 

I debug the code and found that the sector header datas don't be write to data flash when the function Fls_DoJobWrite has been execute , so the sector header can not be read when the job compared, causing the sector header re-write 4 times due to I limit the re-write times with config.

I can see the sector header in the data flash using the debug tool until I reset the CPU.

Could you help me to fix the issue?

[Shaun666]

Hi Daniel，

thank you for the response.

I am sorry for I can not share the project.but I can describe detail .

the RTD version is S32K3_RTD_3_0_0_P01_D2303_ASR_REL_4_7_REV_0000_20230331

the MCU part number is S32K312HMS

You are right, it is caused by the Cache. when I disable the Cache. Every thing is good. but I don't want to disable all Cache to fix the issue, Because I can feel that the preformance of MCU significant decreased. I would like using some config for Fls  on S32DS platform, but I don't know what is the config. Please tell me if there is a synchronization command for Cache in config option.

some detail for the issue:

1. the issue arrived at the NVM ,FEE, FLS first initial phase, because the dflash is erased , the FEE shall initial the sector header.

2. I add FEE mainfunction and FLS mainfunction to initial code. they always run until the FEE state to MEMIF_IDLE.

3. I have been try out to added some delay after FLS mainfunction ,No matter how long the delay time is set, It's getting better sometimes, but it's not okay every the sector header write.

[danielmartynek]

Hi @Shaun666,

Can you specify the MCU part number, RTD version?

Can you share the project?

If you are able to read the data in the flash after reset only, this could be caused by the Cache.

BR, Daniel

[Shaun666]

Hi Daniel，

thank you for the response.

I am sorry for I can not share the project.but I can describe detail .

the RTD version is S32K3_RTD_3_0_0_P01_D2303_ASR_REL_4_7_REV_0000_20230331

the MCU part number is S32K312HMS

You are right, it is caused by the Cache. when I disable the Cache. Every thing is good. but I don't want to disable all Cache to fix the issue, Because I can feel that the preformance of MCU significant decreased. I would like using some config for Fls on S32DS platform, but I don't know what is the config. Please tell me if there is a synchronization command for Cache in config option.

some detail for the issue:

1. the issue arrived at the NVM ,FEE, FLS first initial phase, because the dflash is erased , the FEE shall initial the sector header.

2. I add FEE mainfunction and FLS mainfunction to initial code. they always run until the FEE state to MEMIF_IDLE.

3. I have been try out to added some delay after FLS mainfunction ,No matter how long the delay time is set, It's getting better sometimes, but it's not okay every the sector header write.

[danielmartynek · Accepted solution]

Hi @Shaun666,

Take a look at the RTD_MEM_43_INFLS_UM.pdf

...\S32DS\software\PlatformSDK_S32K3\RTD\Mem_43_InFls_TS_T40D34M30I0R0\doc\

Section 4.5 Parameter MemSynchronizeCache

Regards,

Daniel

[Shaun666]

@danielmartynek  Hello Daniel, thank you, this is useful for enable sync cache.

but I have a problem when the code generated. 

I only enable the Fls Synchronize Cache option and generate code, only a code changed as shown below in the C40_Ip_Cfg.h

/* Enable the use of cache invalidate */

#define C40_IP_SYNCRONIZE_CACHE             (STD_ON)

I got a build issue for CACHE_IP_CORE  CACHE_IP_DATA at below code.

#if (STD_ON == C40_IP_SYNCRONIZE_CACHE)

static inline void C40_Ip_SynchronizeCache(uint32 Address,

                                           uint32 Length

                                          )

{

    /* Invalidate cache */

    (void)Cache_Ip_InvalidateByAddr(CACHE_IP_CORE, CACHE_IP_DATA, Address, Length);

}

#endif

then , I enable the cache support in Cache_Ip config, but without any code change when I generate code. I don't know why. 

 finally , I manual change the CACHE_IP_IS_AVAILABLE to STD_ON in Cache_Ip_Cfg_Defines.h. and build succeed. the Issue have been fixed.

/*-----------------------------------------------/

/  CACHE IP SUPPORT                              /

/-----------------------------------------------*/

#define CACHE_IP_IS_AVAILABLE                        STD_ON

 What is the problem for the CACHE_IP_IS_AVAILABLE config? 

[Shaun666]

it does need to enable CACHE support in MCL config. thank you.