RX FIFO, Id filter table usage

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RX FIFO, Id filter table usage

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buccno
Contributor III

Hi, I noticed something while working on RX FIFO.

When I examine the registers, I see that the ID filter table is empty. When I write the code like this, the IRMQ is set but the ID filter register (Identifier Acceptance Filters) and ID acceptance mode are not set.

In normal mode( for one ID, not using RX FIFO,), I see sent data in the relevant register when I send data. 

But in RX FIFO I couldn't see my data. Where is the problem? Btw, I see my data in IDE watch mode, no problem with the transmission.

 


#define ID_COUNT 10

uint32_t IDs[ID_COUNT] = {0x3C3, 0x212, 0x7AF, 0x720, 0x240, 0x163,0x167,0x168,0x154, 0x148};

bool test_mask_filter(const uint32_t *Idxx, uint8_t size)
{
     uint16_t id_counter;

     flexcan_id_table_t fifo_id_table[size];

    /* ID Filter table */

    for(id_counter = 0U; id_counter < size; id_counter++)
    {
        fifo_id_table[id_counter].isRemoteFrame = false;
        fifo_id_table[id_counter].isExtendedFrame = false;
        fifo_id_table[id_counter].id = Idxx[id_counter];
    }

    /*This function receives a CAN frame using the Rx FIFO.*/
    status_t retval = FLEXCAN_DRV_RxFifo(INST_FLEXCAN_CONFIG_1,&recvBuff);

    /*Set Rx masking type as Rx global mask or Rx individual mask*/
    FLEXCAN_DRV_SetRxMaskType(INST_FLEXCAN_CONFIG_1,FLEXCAN_RX_MASK_INDIVIDUAL);

    /*This function will confgure RX FIFO ID filter table elements,and enable RX FIFO interrupts.*/
    FLEXCAN_DRV_ConfigRxFifo(INST_FLEXCAN_CONFIG_1,FLEXCAN_RX_FIFO_ID_FORMAT_A,fifo_id_table);
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PetrS
NXP TechSupport
NXP TechSupport

Hi,

what did you mean by ID filter register? ID filter table is written into MB area starting from MB6. There should be no issue to see data written there by FLEXCAN_DRV_ConfigRxFifo function.
You can refer e.g. to https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN-RXFIFO-DMA-S32DS-ARM-2018-R...
Or share you project.

BR, Petr

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629件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

what did you mean by ID filter register? ID filter table is written into MB area starting from MB6. There should be no issue to see data written there by FLEXCAN_DRV_ConfigRxFifo function.
You can refer e.g. to https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN-RXFIFO-DMA-S32DS-ARM-2018-R...
Or share you project.

BR, Petr

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