Question regarding the timings of BCTU trigger notification CB

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Question regarding the timings of BCTU trigger notification CB

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kyf
Contributor V

Hello NXP team!

 

I'm working on an automotive project that I need to handle some calculations regarding motor angle at very specific time. As far I've setup my peripherals ADC, BCTU, DMA, TRGMUX, eMIOS, LCU and others....

I believed that I could use the BCTU trigger notification in order to get an interrupt CB running at the same time that BCTU get's triggerred but it seems that there is a bit delay between the trigger and the CB function being executed.

I've used trigger mux in order to drive the eMIOS MCL signal out in a pin.

kyf_0-1672916091762.png

And I'm using SIUL2 in order to toggle an other  pin within the BCTU's trigger CB function in order to check timings.

I have also changed priorities in all other interrupts that I'm using. I've turned them to 5 and 4 and BCTU trigger is set to 0.

The thing that I've noticed is the image bellow:

kyf_1-1672916252273.png

RED line is the eMIOS0_22 RELOAD_OUT signal from trigger mux and the BLUE line is the IO that I'm turning on/off within my CB function.

I've also used persistence mode in the oscilloscope in order to see the timing diffs. My trigger is taken from the RED line.

Question regarding BCTU Trigger Notification.jpg

 

Now some questions:

1. Can someone let me know why there is such big delay since the eMios signal until the CB being called ? It is like 32uS after the timer signal.

2. Is the signal eMios0_22_RELOAD_OUT the same signal that triggers the BCTU ??

3. Can you suggest me anything in order to get a CB running the OverFlow or UnderFlow of the eMIOS MCL timer ?

4. Is it possible to point me out to any extra documentation that could help ? I've read the reference manual, and some BCTU, LCU ppts.

 

 

Kind regards,

kyf.

 

 

 

 

I've also used DWT timer in order to find out the cycled needed too execute my CB function

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

BCTU trigger notification is called (if enabled) when TRGF flag is set, that is when ADC is triggered by BCTU. There are four clock cycles from assertion of a BCTU trigger input to assertion of the first trigger output to the ADC, if ADC is not busy.
The trigger input BCTU_EMIOS_0_22 correspond to channel flag, not eMios0_22_RELOAD_OUT signal. But this can be asserted at the same time for channel configured in MCB mode.
How are the triggered ADCs configured with respect of clock and sampling duration?

BR, Petr

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kyf
Contributor V

Hello @PetrS ,

I've achieved minimum delay between IRQ and ISR at 284-300 ns. I used PGPDO register in order to toggle a GPIO output at the beggining of the ISR. I believe that I can't make this shorter easily and I need also to move the ISR from flash memory to ITCM memory.

Thank you for the help that you've provided in this topic.

 

Kind regards,

kyf

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kyf
Contributor V

Hello @PetrS .

 

regarding your question: How are the triggered ADCs configured with respect of clock and sampling duration?

Those are the configurations of the ADCs. I have an ADC list (2x ADC0 channels and 2x ADC1 channels). The BCTU is triggered every 10KHz by the BCTU_EMIOS_0_22 channel which is configured in MCB mode. 

kyf_1-1673938675070.png     kyf_4-1673939166617.png

Clocks are 160MHz (ExternalOSC + PLL) and the prescaller value of the ADC is 2 in both channels.

kyf_3-1673939071027.png

 

I would like to make 1 extra question.

kyf_6-1673940933275.png

I've used persistence mode in the oscilloscope because I had fluctuations in the timings (this probably is cause by my code because in some parts of code like saving to flash memory I'm disabling/enabling all the IRQs.). This way I could find minimum and maximum latency.

I've measured the time between event and IRQ with my oscilloscope by capturing the PWM signal (via TrigMux) and a GPIO pin which gets  toggled.

I've seen that there is a lot of delay between the two signals and I can not explain why. I've seen times like 5-17uS delay.

But I've been able to achieve a 2uS delay by:

1. I've set optimization lvl to -O3 (most)

2. I'm toggling the GPIO pin right in the beginning of the ISR function before the handler and not inside the CB function.

3. All IRQ priorities are set to 10 after IntCtrl_Init. Corresponding eMIOS_PWM_IRQ priority was set to 0 and BCTU IRQ priority was set to 1

 

Are those timing values valid ?

Can you come up with anything to improve those timings? ....because I was expecting this delay to be in the nS and not in uS scale. Obviously I've configured something wrong here but I can not think of something.

 

 

Kind regards,

kyf

 

 

 

 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

it looks most delay is due to SW overhead of driver, you wrote you are able to decrease time by setting higher optimization and measure at beginning of ISR routine. Put this toggling in more places from first ISR instruction till callback, and set BCTU ISR to have highest priority and see delays.

BR, Petr

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

BCTU trigger notification is called (if enabled) when TRGF flag is set, that is when ADC is triggered by BCTU. There are four clock cycles from assertion of a BCTU trigger input to assertion of the first trigger output to the ADC, if ADC is not busy.
The trigger input BCTU_EMIOS_0_22 correspond to channel flag, not eMios0_22_RELOAD_OUT signal. But this can be asserted at the same time for channel configured in MCB mode.
How are the triggered ADCs configured with respect of clock and sampling duration?

BR, Petr

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