Question regarding FlexCAN -- S32K344 mcu -- FlexCAN_Ip_ConfigRxMb()

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Question regarding FlexCAN -- S32K344 mcu -- FlexCAN_Ip_ConfigRxMb()

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kyf
Contributor V

Hello NXP team !

I'm working on devBoard S32K3x4EVB-Q172 and I'm trying to figure out how FlexCAN does work.

I have a question regarding FlexCAN_Ip_ConfigRxMb() function.

Of what I've read so far and of what I've tested so far I understand that FlexCAN_Ip_ConfigRxMb() function does set-up the receive message buffer.

But I can not find what role does the uint32 msg_id parameter have.As far I can understand that it is used to filter the ID of a frame in order to read or not a frame.

1. Is there any option to disable this feature ?

2. Is there any way to read all incoming CAN frames without filtering by their CAN-ID ?

3. Is there any documentation or training matterial regarding the FlexCAN ?

 

My configuration setup is as simple as it can get. I'm attaching the code that I'm using in order to test and validate CAN functionality.

#include "Mcal.h"
#include "Clock_Ip.h"
#include "FlexCAN_Ip.h"
#include "IntCtrl_Ip.h"
#include "Siul2_Dio_Ip.h"
#include "Siul2_Port_Ip.h"

#define MSG_ID 0x601//20u
#define RX_MB_IDX 1U
#define TX_MB_IDX 0U
volatile int exit_code = 0;

uint8 dummyData[8] = {1,2,3,4,5,6,7};
volatile uint8_t i = 0;

extern void CAN0_ORED_0_31_MB_IRQHandler(void);

int main(void)
{
    /* Write your code here */
    Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);

    Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);

    //Put the transeiver to Normal Mode
    Siul2_Dio_Ip_WritePin(CAN_EN_PORT  , CAN_EN_PIN  , 1);
    Siul2_Dio_Ip_WritePin(CAN_nSTB_PORT, CAN_nSTB_PIN, 1);

    IntCtrl_Ip_EnableIrq(FlexCAN0_1_IRQn);
    IntCtrl_Ip_InstallHandler(FlexCAN0_1_IRQn, CAN0_ORED_0_31_MB_IRQHandler, NULL_PTR);

    Flexcan_Ip_DataInfoType rx_info = {
            .msg_id_type = FLEXCAN_MSG_ID_STD,
            .data_length = 8u,
            .is_polling = TRUE,
            .is_remote = FALSE
    };
    Flexcan_Ip_MsgBuffType rxData;
    FlexCAN_Ip_Init(INST_FLEXCAN_0, &FlexCAN_State0, &FlexCAN_Config0);
    FlexCAN_Ip_SetStartMode(INST_FLEXCAN_0);
    FlexCAN_Ip_ConfigRxMb(INST_FLEXCAN_0, RX_MB_IDX, &rx_info, 0);
    rx_info.is_polling = FALSE;
    while(1)
    {
//		FlexCAN_Ip_Send(INST_FLEXCAN_0, TX_MB_IDX, &rx_info, MSG_ID, (uint8 *)&dummyData);
    	FlexCAN_Ip_Receive(INST_FLEXCAN_0, RX_MB_IDX, &rxData, TRUE);
		if(FlexCAN_Ip_GetTransferStatus(INST_FLEXCAN_0, RX_MB_IDX) != FLEXCAN_STATUS_SUCCESS)
		{
			__asm__ ("nop");
			FlexCAN_Ip_MainFunctionRead(INST_FLEXCAN_0, RX_MB_IDX);
		}
//		for (i= 0; i < 7; i++)
//		{
//			dummyData[i]+= 1;
//		}
    }
	FlexCAN_Ip_SetStopMode(INST_FLEXCAN_0);
    FlexCAN_Ip_Deinit(INST_FLEXCAN_0);
    return 0;
}

My peripheral configurations are located in the image bellow:

kyf_0-1666279294514.png

 

Kind regards,

kyf

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1 Solution
914 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

msg_id specifies a std/ext ID to be received into used message buffer. A configured ID is compared with received one and if match is found a receive message is stored into the MB. Mask register can be used to define which ID bit will be don't care.
1. no
2. you can use mask acceptance register
3. I can recommend to read chapter Receive and Matching of the RM. Moreover you can refer to below trainings and guide
https://www.nxp.com/webapp/Download?colCode=17_S32K3XX_COMMUNICATION_MODULES_FLEXCAN_TRAINING
https://www.nxp.com/webapp/Download?colCode=18_S32K3XX_COMMUNICATION_MODULES_FLEXCAN_WITH_RTD 
https://community.nxp.com/t5/S32K-Knowledge-Base/S32K1xx-FlexCAN-Mask-Setting-Demo/ta-p/1519753

Finally I posted simple demo for TX/RX/RXFIFO usage at https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-FlexCAN-Ip-TX-RX-EnhanceRXFIFO-test...

BR, Petr
 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

msg_id specifies a std/ext ID to be received into used message buffer. A configured ID is compared with received one and if match is found a receive message is stored into the MB. Mask register can be used to define which ID bit will be don't care.
1. no
2. you can use mask acceptance register
3. I can recommend to read chapter Receive and Matching of the RM. Moreover you can refer to below trainings and guide
https://www.nxp.com/webapp/Download?colCode=17_S32K3XX_COMMUNICATION_MODULES_FLEXCAN_TRAINING
https://www.nxp.com/webapp/Download?colCode=18_S32K3XX_COMMUNICATION_MODULES_FLEXCAN_WITH_RTD 
https://community.nxp.com/t5/S32K-Knowledge-Base/S32K1xx-FlexCAN-Mask-Setting-Demo/ta-p/1519753

Finally I posted simple demo for TX/RX/RXFIFO usage at https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-FlexCAN-Ip-TX-RX-EnhanceRXFIFO-test...

BR, Petr
 

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kyf
Contributor V

Hello @PetrS .

 

I've seen the example that you've posted like an hour ago.

Finally I posted simple demo for TX/RX/RXFIFO usage at https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-FlexCAN-Ip-TX-RX-EnhanceRXFIFO-test...

Thank you for your answer to my query. I will go test and do some more study regarding this matter.

 

Kind regards,

kyf

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