Pwm_SetDutyPhaseShift() always add 1 to phase shift value for EMIOS_PWM_IP_MCB_UP_COUNTER bus mode

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Pwm_SetDutyPhaseShift() always add 1 to phase shift value for EMIOS_PWM_IP_MCB_UP_COUNTER bus mode

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JawadAli
Contributor II

Mcu S32K312, Nxp Mcal (Autosar Version 4.4.0, Software Version 2.0.0)

Cpu core clock 120Mhz, Pwm period 50us, Pwm period in ticks 2000.

Mcl module configuration:

JawadAli_0-1685803019326.png

Pwm module configuration:

JawadAli_1-1685804076734.png

Scenario: Right aligned pwm with 50% duty cycle. Apparently this shall be possible as follows:

JawadAli_0-1685804766513.png
Pwm_SetDutyPhaseShift API calls Emios_Pwm_Ip_SetPhaseShift function which increment phase shift value by 1 for EMIOS_PWM_IP_MCB_UP_COUNTER bus mode and writes 1001 to register A for first edge.

Then Pwm_SetDutyPhaseShift API calls Emios_Pwm_Ip_SetDutyCycleOpwmb function which checks if "duty cycle in ticks + incremented phase shift > period" which is always true and then it return error.

Same error happens if I set phase shift 0 and duty cyle 100%, Although from API description these are valid values.

JawadAli_0-1685804001631.png

In case of non zero phase shift, a work around is to pass "phase shift -1" to Pwm_SetDutyPhaseShift API but if I have to set 0 phase shift then its not possible.

@PetrS @VaneB any help will be appreciated. Thanks

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JawadAli
Contributor II

@PetrS @VaneB I am blocked because of this issue, kindly guide me on this. Thank You

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nxf78987
NXP Employee
NXP Employee

Hello @JawadAli,

In the past, the development team detected this issue.

And this issue was fixed on the S32K3 RTD 3.0.0 version.

To fix this error on the RTD 2.0.0 version, you can replace the Emios_Pwm_Ip.c by the attachment file. But this file didn't still test by the development team. So, if you want to the development team perform test this modified file. You can request a hotfix for the S32K3 RTD 2.0.0 version.

Best regards,

Dan

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