Hi, NXP
When developing with S32K311, an external crystal oscillator of 16 MHz is selected. When configuring CANFD, the CAN clock source uses the AIPS_PLAT_CLK at 60 MHz. 80% sampling point is configured for the data field, and TDC is enabled. However, the actual measured sampling point in CANOE can only reach 72%.
This issue also occurs in tests on other models such as the S32K312 and S32K342.
The following is one of our configurations where we set the sampling points and test data. We configured the sampling point to be 76%, but the actual test result was 67%.


Best Regards,
xianlong