OpenSDA (MK20DX128VFM5) connection details

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OpenSDA (MK20DX128VFM5) connection details

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ankan_creatara
Contributor III

Hello Everyone,

Greetings of the day.

Please help me understand this issue.

I am facing a small problem in the power supply of the openSDA chip.

The MK20DX128VFM5 chip is used for this purpose. I am sharing the screenshot as well for your reference.

The chip has a pin no. 5, VOUT33; which gives out 3.3V output. Again, at pin no. 1 (VDD1)and 7(VDDA), we need to supply 3.3V to the chip.

My question is, are we going to supply 3.3V separately to this VDD1 and VDDA pins; or can we use the output of VOUT33 to supply the same chip.

I have never seen a chip being powered up from its own output.


Please help.

Thank you for your time.

WhatsApp Image 2022-10-12 at 6.31.50 PM.jpeg

WhatsApp Image 2022-10-12 at 6.31.50 PM (1).jpeg

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi ankan_creatara,

There is a USB regulator in this MCU, so VOUT33 can power VDD VDDA when VREGIN is connected to VBUS. Kinetis K20: 50MHz Cortex-M4 up to 160KB Flash (32 pin)

3.9.1.2.3 USB bus power supply.png

Best Regards,
Robin
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ankan_creatara
Contributor III

Hi @Robin_Shen ,

Thank you so much for your time and support.

                                                                                         PART-A
 
Could you kindly help me understand what exactly V_TGTMCU is? As I can see in the schematic as well, VDD is same as V_TGTMCU is it true? What is the value of VDD here? Is it 3.3V or 5V?

ankan_creatara_1-1665742134889.png

 



ankan_creatara_0-1665742101075.png

 



Please help.


                                                                                         PARTB

There are other instances of VDD as well. I have attached a screenshot of the same for your kind reference. 

ankan_creatara_0-1665741941422.png


Are both the VDD of PART A and PART B same? If not, what would be the value of VDD in PART B? 

Please help



Thank you for your time.

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Robin_Shen
NXP TechSupport
NXP TechSupport

The voltage of VDD is 5V by default on S32K144EVB, because J10 Jumper defaults to DNP, and P5V0 is connected to VDD through R64.

J10 S32K144EVB RevB1.png

These level shifter chips are needed because the voltage of VDD may be different from P3V3_SDA or P5V_SBC due to the J10 jumper setting.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi ankan_creatara,

There is a USB regulator in this MCU, so VOUT33 can power VDD VDDA when VREGIN is connected to VBUS. Kinetis K20: 50MHz Cortex-M4 up to 160KB Flash (32 pin)

3.9.1.2.3 USB bus power supply.png

Best Regards,
Robin
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ankan_creatara
Contributor III

Hi @Robin_Shen ,

Thank you for your insight. 

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