@danielmartynek
I'm using the ERM (Error Reporting Module) for error notification. I’m able to trigger the ISR for single-bit errors, but the ISR is not being called for multi-bit errors.
Non-correctable error events means multi-bit errors, correct?
I can see that the non-correctable error event bit is set in the SR0 register, but the interrupt handler is still not triggered.
Could you please help me understand how to configure or trigger the interrupt handler for SRAM multi-bit errors?
