Hello NXP,
I am having an issue with LPUART Rx via interrupt,
I have used following code using the macros from library header file s32K144.h,
The Tx works perfectly fine, But Rx is recieved with garbage. There is an obeservation
that RDRF bit gets disables before we read DATA register. I am not sure how this is related to
my issue but It seems incorrect for me though(as per RM Page 1707).
Please let help me in debugging the issue...
/************CODE STARTS HERE**********************/
/* Global static character */
uint8 static u8TxChar = 0u;
uint8 static u8RxChar = 0u;
void LPUART1_Init(void)
{
DISABLE_INTERRUPTS();
/* Step 1 : Enable Clock : 8Mhz Clk Init is used from the example project*/
PCC->PCCn[PCC_LPUART1_INDEX] &= ~PCC_PCCn_CGC_MASK; /* Ensure clk disabled for config */
PCC->PCCn[PCC_LPUART1_INDEX] |= PCC_PCCn_PCS(0b010) /* Clock src=2 (SIRCDIV2_CLK) */
| PCC_PCCn_CGC_MASK; /* Enable clock for LPUART1 regs */
/* Step 2 Initialize the Baud and CTRL, with SBR 0x11, and OSR 0x03000011
Tx Enable Rx Enable, RIE Enable*/
LPAURT1 -> BAUD = 0x03000011; /* 115200 Baud rate */
LPAURT1 -> CTRL = 0x002C0000;
/* Initialize interrupt */
S32_NVIC->ICPR[1u] = 1 << (LPUART1_RxTx_IRQn % 32); /* IRQ99 - FTM1 ch0,1: clear any pending IRQ*/
S32_NVIC->ISER[1u] = 1 << (LPUART1_RxTx_IRQn % 32); /* IRQ99 - FTM1 ch0,1: enable IRQ */
S32_NVIC->IP[LPUART1_RxTx_IRQn] = 0x00; /* IRQ99 - FTM1 ch0,1: priority 0 of 0-15*/
ENABLE_INTERRUPTS();
}
void LPUART1_TxChar(sint8 u8Char)
{
u8TxChar = u8Char;
LPAURT1 -> CTRL |= LPUART_CTRL_TIE(1u);
}
void LPUART1_RxTx_IRQHandler(void)
{
/* Tx Data */
if( TRUE == (((LPAURT1 -> STAT) & LPUART_STAT_TC_MASK ) >> LPUART_STAT_TC_SHIFT) )
{
/* Write into the Data register*/
LPUART1 -> DATA = u8TxChar;
/* Disable interrupt*/
LPAURT1 -> CTRL &= ~LPUART_CTRL_TIE_MASK;
}
/* Rx Data */
if(TRUE == (((LPAURT1 -> STAT) & LPUART_STAT_RDRF_MASK ) >> LPUART_STAT_RDRF_SHIFT ))
{
/* Write into the Data register*/
u8RxChar = LPUART1 -> DATA ;
}
}
/*****************CODE ENDS HERE***************************/
