NVIC pending register and Peripheral interrupt status register

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NVIC pending register and Peripheral interrupt status register

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DavidMunoz
Contributor II

I know NVIC has its pending register bit per interrupt and peripherals have interrupt status register, then in a ISR is always recommended to:

  • Check the peripheral interrupt status register (Avoiding detect spurious interrupt by NVIC)
  • Execute the ISR functionality
  • Clear the peripheral interrupt register

Then my questions are:

  • When is it necessary to clear the NVIC pending register?
  • Is it always clear by itself?

Assume ARMv6-M Architecture.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi David,

The NVIC pending flag is cleared by the HW when the interrupt becomes active.
So, there is no need to clear it by SW.


BR, Daniel

 

 

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