Mass erase, voltage interruption and FSEC

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Mass erase, voltage interruption and FSEC

ソリューションへジャンプ
744件の閲覧回数
luca_toso
Contributor II

Hi All, 

let's assume that we have enabled security on the device, but leaving mass erase enabled. 

What happens if we launch the command and after some ms we abruptly interrupt the voltage? 

Is it possible that with a timed interruption only the first flash sector is erased and the next POR cycle the FSEC status allows the jtag/swd debugger to connect and perform readback of the remaining program code?

K.R.

Luca.

タグ(3)
0 件の賞賛
1 解決策
732件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Luca,

The security is released once it has been verified that all the memory has been erased.

If only the first sector was erased, the MCU would still be secure since SEC = 11b = secure.

danielmartynek_0-1625642021308.png

danielmartynek_2-1625642239948.png

Regards,

Daniel

 

 

 

 

 

元の投稿で解決策を見る

0 件の賞賛
1 返信
733件の閲覧回数
danielmartynek
NXP TechSupport
NXP TechSupport

Hi Luca,

The security is released once it has been verified that all the memory has been erased.

If only the first sector was erased, the MCU would still be secure since SEC = 11b = secure.

danielmartynek_0-1625642021308.png

danielmartynek_2-1625642239948.png

Regards,

Daniel

 

 

 

 

 

0 件の賞賛