LPIT-ADC-DMA

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LPIT-ADC-DMA

192 Views
Contributor II

Hello , 

I have a question regarding the LPIT Triggered ADC and ADC Trigger DMA .DMA will create the interrupt after the 50 values .

The problem is it generates the Interrupt but i get the Waveform like this .I am giving Sine Wave as input .

the output(blue in color )  looks like this : Somehow i get this jump every 50 Values .

pastedImage_1.png

Could someone help me with this ?

Thanks 

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5 Replies

39 Views
NXP TechSupport
NXP TechSupport

Hello ushma.cholera@dbk-group.com,

Hard to say, can you share a test project so that I can reproduce this issue?

Do you output raw ADC results from SRAM? Or is it recalculated?

BR, Daniel

39 Views
Contributor II

Hello Daniel, 

I have now modified the DMA configuration and so i have better output but what is still missing is some values are having jumps at particular intervals .

static void LPIT_init(void)
{
LPIT0->TMR[TIMER_CH0].TVAL = LPIT_TMR_TVAL_TMR_VAL(20);
LPIT0->TMR[TIMER_CH0].TCTRL=LPIT_TMR_TCTRL_T_EN(1);
LPIT0->MIER = 0x01;
LPIT0->SETTEN = (u32)(0x01);

LPIT0->TMR[TIMER_CH1].TVAL = LPIT_TMR_TVAL_TMR_VAL(20);
LPIT0->TMR[TIMER_CH1].TCTRL=LPIT_TMR_TCTRL_T_EN(1)|LPIT_TMR_TCTRL_CHAIN(1);

}

static void Main_InitdmaTask(void)
{
CPU_EnableIRQ(DMA0_IRQn);
PCC->PCCn[PCC_DMAMUX_INDEX] |= PCC_PCCn_CGC_MASK;
// DMA is enabled
DMA->ERQ= DMA_ERQ_ERQ0(1)|DMA_ERQ_ERQ1(1);



DMA->TCD[0].SADDR= 0x4003B048; // Source address from hwere DMA needs to pick up values
DMA->TCD[0].ATTR = DMA_TCD_ATTR_SMOD(0) |DMA_TCD_ATTR_SSIZE(2)|DMA_TCD_ATTR_DMOD(0) |DMA_TCD_ATTR_DSIZE(2);
DMA->TCD[0].SOFF = 0;
DMA->TCD[0].NBYTES.MLNO = 4;
DMA->TCD[0].SLAST =0;


DMA->CR = DMA_CR_CLM(1);


/* Destination Configuration */
DMA->TCD[0].DADDR = (uint32_t) &TCD0_Dest[0];//Destination address

//Destination address
DMA->TCD[0].DOFF = 4; // address shift after each transfer

DMA->TCD[0].DLASTSGA =-400;


DMA->TCD[0].CITER.ELINKNO = DMA_TCD_CITER_ELINKNO_CITER(0x64) |DMA_TCD_CITER_ELINKNO_ELINK(0);

// Minor loop count , elink is used while Mior loop waits for the ADC to be finished and then trigger the DMA transfer

DMA->TCD[0].BITER.ELINKNO = DMA_TCD_BITER_ELINKNO_BITER(0x64)|DMA_TCD_BITER_ELINKNO_ELINK(0);//DMA_TCD_BITER_ELINKNO_BITER_MASK

//Major loop configuration and interrupt Configuration
DMA->TCD[0].CSR=DMA_TCD_CSR_START(0) |
DMA_TCD_CSR_INTMAJOR(1) |
DMA_TCD_CSR_INTHALF(1) |
DMA_TCD_CSR_DREQ(0) |
DMA_TCD_CSR_ESG(0) |
DMA_TCD_CSR_MAJORELINK(1) |
DMA_TCD_CSR_ACTIVE(0) |
DMA_TCD_CSR_DONE(0) |
DMA_TCD_CSR_MAJORLINKCH(0) |
DMA_TCD_CSR_BWC(0);

//DMA->TCD[0].BITER.ELINKNO= DMA_TCD_BITER_ELINKNO_BITER(4) | DMA_TCD_BITER_ELINKNO_ELINK(0);
DMAMUX->CHCFG[0] = DMAMUX_CHCFG_SOURCE(0x2A)|1<<DMAMUX_CHCFG_ENBL_SHIFT|0<<DMAMUX_CHCFG_TRIG_SHIFT;// DMA is triggered by ADC


//CPU_SetPriorityIRQ((u8)DMA1_IRQn, (u8)0);
}

i have enabled the intmajor and inthalf and major e link i have interrupt at every 50 values .when i have interrupt i have some values which out of the pattern .

pastedImage_1.png

i just do raw output no recalculation directly reading from the R[0].This is much better then the previous one but what is not understandable is some small jumps in between.

let me know if you need more information 

Thanks for the quick reply. 

Ushma 

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39 Views
NXP TechSupport
NXP TechSupport

Hello Ushma,

I don't any issue in the configuration.

You don't need the Continuous Link Mode though.

Do you use any other DMA transfers or do you trigger the same ADC module from a different source?

Thanks,

BR, Daniel 

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39 Views
Contributor II

Hello Daniel, 

I used the same ADC0 to trigger DMA .i trigger ADC with TIMER which LPIT .

ADC when finished trigger DMA .

I just tried with Removal of major Elink and ADC continuous conversion  mode .i have a better result but not the best .

pastedImage_1.png

Thanks 

Ushma

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39 Views
NXP TechSupport
NXP TechSupport

Hello Ushma,

Did you remove the Continuous Link Mode DMA_CR_CLM(0) as well.

Thanks,

BR, Daniel

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