Hi there, I am facing troubles S32K3X4 Q172 EVB currently testing the SPI Functionality, I have configured the it as SPI Master, I am sending some data using the LPSPI2 Instance at slave side I am using the Arduino UNO and also the Logic Analyser But i am getting some Incorrect data at arduino side and logic analyser.
This is my main code and Spi configurations at the master side and also the configurations that i put at the slave side .
/*
* (c) Copyright 2020 NXP
*
* NXP Confidential. This software is owned or controlled by NXP and may only be used strictly
* in accordance with the applicable license terms. By expressly accepting
* such terms or by downloading, installing, activating and/or otherwise using
* the software, you are agreeing that you have read, and that you agree to
* comply with and are bound by, such license terms. If you do not agree to
* be bound by the applicable license terms, then you may not retain,
* install, activate or otherwise use the software.
*
* This file contains sample code only. It is not part of the production code deliverables.
*/
#ifdef __cplusplus
extern "C" {
#endif
#include "Clock_Ip.h"
#include "Siul2_Port_Ip.h"
#include "Lpspi_Ip.h"
#include "IntCtrl_Ip.h"
#define TIMEOUT ((uint32)1000000UL)
#define NUMBER_OF_BYTES (4)
#define MASTER_EXTERNAL_DEVICE (Lpspi_Ip_DeviceAttributes_SpiExternalDevice_0_Instance_2_BOARD_InitPeripherals)
#define SPI_START_SEC_VAR_CLEARED_8_NO_CACHEABLE
#include "Spi_MemMap.h"
static __attribute__(( aligned(32) )) uint8 RxMasterBuffer[NUMBER_OF_BYTES];
#define SPI_STOP_SEC_VAR_CLEARED_8_NO_CACHEABLE
#include "Spi_MemMap.h"
#define SPI_START_SEC_VAR_INIT_8_NO_CACHEABLE
#include "Spi_MemMap.h"
static __attribute__(( aligned(32) )) uint8 TxMasterBuffer[NUMBER_OF_BYTES] = {0x10, 0x17, 0x09, 0x23};
#define SPI_STOP_SEC_VAR_INIT_8_NO_CACHEABLE
#include "Spi_MemMap.h"
void TestDelay(uint32 delay)
{
static volatile uint32 DelayTimer = 0;
while (DelayTimer < delay)
{
DelayTimer++;
}
DelayTimer = 0;
}
int main(void)
{
/* Initialize clock */
Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
/* Configure pins */
Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);
IntCtrl_Ip_Init(&IntCtrlConfig_0);
IntCtrl_Ip_ConfigIrqRouting(&intRouteConfig);
Lpspi_Ip_Init(&Lpspi_Ip_PhyUnitConfig_SpiPhyUnit_0_Instance_2_BOARD_InitPeripherals);
Lpspi_Ip_UpdateTransferMode(Lpspi_Ip_PhyUnitConfig_SpiPhyUnit_0_Instance_2_BOARD_InitPeripherals.Instance, LPSPI_IP_INTERRUPT);
while(1){
Lpspi_Ip_SyncTransmit(&Lpspi_Ip_DeviceAttributes_SpiExternalDevice_0_Instance_2_BOARD_InitPeripherals, TxMasterBuffer, RxMasterBuffer, NUMBER_OF_BYTES, TIMEOUT);
TestDelay(50000);
}
return 0;
}
#ifdef __cplusplus
}
#endif
/** @} */
