I'm confused about transfer adc result to memory with dma

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

I'm confused about transfer adc result to memory with dma

444 Views
Piper123
Contributor I

Hi:

    I want to transfer adc result to memory with dma, but failed. here is my question, on condition that I configed to use software trigger to start a adc conversition, whether using dma to transfer adc data is legal. If using dma to transfer adc data is legal,  is there any example? or how to config dma and adc registers?  

0 Kudos
6 Replies

438 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

could you please specify a device you have?

BR, Petr

0 Kudos

428 Views
Piper123
Contributor I

S32k146uavlq  evb from nxp

0 Kudos

425 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes, it is possible. An SC2[DMAEN] controls if DMA request is generated upon complete conversion

PetrS_0-1666610799086.png

Then you need to config DMAMUX channel to route ADC DMA request to DMA channel and configure DMA channel descriptor to do a moves you need. 

You can refer to below examples, but it uses HW triggering from PDB
non-sdk: https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-PDB-ADC-trigger-DMA-ISR-S32DS/ta-p/...
sdk: https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-PDB-ADC-DMA-S32DS-ARM-2018-R1/ta-p/...

BR, Petr

 

0 Kudos

422 Views
Piper123
Contributor I

Hi, PetrS

        I have read the example you give, and compare with my configurations, DMAMUX and DMA configurations have no difference. Then only difference is my project use only DMA channel0, and ADC just use the channel 0 of ADC0.

        I have test the adc and dma separatly,  both adc  dma can work normally. Dma use software trigger mode also can transfer data from ADC0->R[0] to memory. But after I config DMAMUX->CHCFG.SOURCE = 0x2A and anable adc DMAEN bit, it doesn't work. Is there any step I missed?

   Pictures below is some register's value, Please help me check. Thanks.

微信图片_20221024220135.png微信图片_20221024220146.png微信图片_20221024220153.png微信图片_20221024220200.png微信图片_20221024220206.png

 

0 Kudos

419 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

is the DMAMUX clocked and do you have DMAMUX->CHCFG.ENBL set as well? Or share the code you have.

BR, Petr

0 Kudos

409 Views
Piper123
Contributor I
Hi, Petrs
Thanks for your help. I have found the reason of the problem; I configured two dma channels with the same priority and use thte periodic trigger incorrctly.
0 Kudos