How to use s32k144 aips?

[kmh48301]

Hi

I need to protect and unprotect the flash memory dynamicaly.

So I studied MPU and Flash protection register and AIPS.

MPU and Flash protection register cannot be solution.

And the AIPS(peripheral access protection) explanation is not enough to use in RM.

I think wp bits in OPACR is something related.

But I can't figure out that each wp bits indicate to where.

Can you please explain how to use AIPS in detail?

Thanks

Best Regards

Phillip

[danielmartynek]

Hello Phillip,

Which peripheral registers do you want to write-protect?

Please refer to the S32K1xx_Mamory_Map.xlsx that is attached to the RM.

Regards,

Daniel

[kmh48301]

Hi Daniel

What does the 'x's mean?

Which peripheral registers do you want to write-protect?

: I want to write-protect the FTFC.

So OPACR Slot1 would be the one.

But how can I protect?

Thanks

Best Regards

Phillip

[danielmartynek · Accepted solution]

Hi Phillip,

the 'X' means that the Peripheral Access Control is present on the S32K1 derivative.

The Peripheral Access Control for FTFC is in OPACRA, Slot 0.

It depends on your requirements, if you want to write-protect the FTFC registers agains any write, set OPACRA[WP0] = 1.

Regards,

Daniel