How to receive a large number of CAN messages with S32K148?

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How to receive a large number of CAN messages with S32K148?

1,153 Views
Poley
Contributor V

Hi, 

We are currently using a S32K148 and needing to receive a largish number on CAN messages on CAN1. We have 19 nodes all sending to the main S32K148 board, overall there is 87 messages every 100ms (Still only 20% bus load).

I have been using this with the MBDT however the blocks in this can not deal with this amount of CAN messages. This is the result of a simple model with just my receive blocks echoing counters back onto CAN: 

Poley_0-1645480931654.png

As you can see this misses a crazy amount of messages and the CAN data is critical for us. I am now thinking of implementing CAN receive with a custom code block as I am running out of options and the project is due anyday now.

Is this be possible with this chip? any help is greatly appreciated! 

Thank you

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5 Replies

1,129 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

FlexCAN is certainly able to receive all messages, but it depends what everything is done in application, if it is able to read received message from MB/RXFIFO in time. So not sure of shortest time between messages you have.
Generally you can prepare more MBs to receive single ID or ID range, RXFIFO can be enabled too (if CANFD is not used). You can set highest priority for FlexCAN interrupts which can help to react in time. Also DMA can read message from RXFIFO.

You can find basic examples within S32Design studio or in S32K Community.
If you want to still use MATLAB/Simulink to create own blocks, please discussed this on MBDT community space; https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/bd-p/mbdt  

BR, Petr

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1,124 Views
Poley
Contributor V

Hi Petr,

Thanks for the reply!

I am currently using 22 MB’s for receive functionality, 6 of which only have 1 ID in them with a mask of 0x7FF on them. the other 16 only having to accept 5 messages (301-305 for example and I set 0x7F8 to all anything in last 3 bits). I am not sure if I can use FIFO as it is only 6 messages deep and I have 19 nodes sending 88 messages/ID’s at 100ms. Would FIFO be able to handle that?

My step tick of code is 5ms, I am not sure if that makes a difference. I am unable to use a faster CAN speed as the application code adds delays due to it taking too long to complete tasks (more than step time). Which again I am very surprised that I can’t go lower as with the same logic on a 32 dsPIC it handles it fine at 1ms.

thanks!

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1,107 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

do you have MCR[IRMQ] set so reception queue you have can work? Suppose it is. If it is negated,
the matching winner is the first matched MB regardless if it is free-to-receive or not.

FIFO is able to store that, but for sure you need to read it in time, otherwise you can lost message. The same is for regular MBs too. FIFO is able to store up to 6 messages without reading it by CPU.
Moreover DMA can be used to read out messages from FIFO.

BR, Petr 

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1,100 Views
Poley
Contributor V

Yes that is set. Here is how my registers are during runtime:

Poley_1-1645801837705.png

I have attached a DIO to measure the interrupt time. I have random moments in the plot where the interrupt takes 10x longer than normal:

Poley_0-1645801732448.png

It also randomly stops receiving an interrupt for a certain ID. I didn't receive any for 1 ID for 2 minutes and then it started again. Others carried on working fine.

The MBDT FIFO does not work annoyingly to test FIFO. And I am unsure on the c code side of these cortex devices to be able to implement custom code for CAN receive.

Thanks

 

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1,073 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

unfortunately I am not able to comment MBDT usage, please ask this on MBDT community, but seems you already posted some questions there.

Some older RXFIFO baremetal code is given here
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN0-RXFIFO-DMA-nonSDK-S32DS13/...

BR, Petr

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