How to change the bit value of TDCOFF

[kimjunghyun]

Hi.

I have a question for how to change the bit value of TDCOFF.

I changed TDCOFF related macro at the source code.

 - from x to 3

 - from x to 8

 - from x to 10

But I confirmed TDCOFF bit value was always 1 1110 at the EmbSys Register window.

In other words, although I changed TDCOFF bits at the source code, TDCOFF bits was not changed.

 

I wonder I can change TDCOFF bits?

Thank you.

Kim.

[PetrS]

Hi Kim,

Allen is correct. FDCTRL[TDCEN] must be written in the Freeze mode only.

So be sure the module is in freeze mode.

This is possible if MCR[FRZ] is set AND

- HALT bit is set in the code

- debug mode is entered

The MCR[FRZACK] indicates if the module is in Freeze mode or not.

If you want to use macros within code do it in this way…

CAN0->FDCTRL = CAN_FDCTRL_FDRATE(1) | // FDRATE=1: enable Bit Rate Switch

                                CAN_FDCTRL_MBDSR0(3) | // MBDSR0=3: Region 0 has 64 bytes data in frame's payload

                                CAN_FDCTRL_TDCEN(1) |    // TDCEN=1: enable Transceiver Delay Compensation

                                CAN_FDCTRL_TDCOFF(5);  // TDCOFF=5: 5 CAN clocks offset used

Or directly with register value

CAN0->FDCTRL =0x80038500;

BR, Petr

[kimjunghyun]

Hi. Stancik

Thank you for your answer.
I will check the code.

Kim.

[allen_willson]

Kim,

Per the reference manual, TDCOFF can only be written while the FlexCAN is in FREEZE mode.  There are specific conditions for freeze mode to be entered. Please see section 49.5.11.1 in the reference manual for these details.

If you've already been receiving/transmitting messages, then you'll need to reenter freeze mode before changing this register.

-AllenW

[kimjunghyun]

Hi. Willson

Thank you for your answer.
I will check the FREEZE mode.

Kim.