How to Change SPI Data time interval With MCAL

[biyangdong]

Hello,I have some questions about the spi used in Mcal configuration.

the frist is that the frist byte have a long time interval to second byte. for example,I send 5 bytes by spi every time,the frist byte to second byte's time interval are 163us,the other four bytes timeinterval are normal control by "SpiTimeClk2Cs","SpiTimeCs2Clk","SpiTimeCs2Cs". how can i change this interval?

the second question is how to decrease the interval between frames.in the picture below,the frist frame and the second frame have a time interval about 280us,but in my code the delay is 50us，what dicided this time?

the third question is this this delay time about 50us is necessary,if i set this time to 30us,some frame would be lost is a continuous send operation, so how to slove this problem. the spi send functions i used in below screenshot.

[namnguyenviet]

Hello @biyangdong,

I am kinda seeing a similar issue, which the time interval between the 1st byte and the 2nd byte is a bit longer than the other. I have modified the code to get rid of the issue, unfortunately I'm not allowed to public share via the community. I have sent you an email for the change. Please try it in your site and tell me if you can fix your issue.

Best Regards,

Nam

[hongthiet1994]

I also get the same error as this, I get a long pulse period between data bytes being sent.
You can send me your information via email hongthiet1994@gmail.com

[hongthiet1994]

I also get the same error as this, I get a long pulse period between data bytes being sent.
You can send me your information via email hongthiet1994@gmail.com

[biyangdong]

Hi,Thanks for your reply.

i try your suggestion and it works,sloved the problem about the time interval between the 1st byte and the 2nd byte is a bit longer than the other.

you say in email that It's potentially a bug in the driver. i want to know if it is finally solution that delete the function call about Mcl_DmaStartChannel() in Spi_LPspi_ChannelTransferDmaInitTX().if not, how safety to fixed this problem?

[namnguyenviet]

Hello, 

Thanks for your info. Let me discuss with team about the issue and I will feedback later. Meanwhile, please temporarily use the workaround for your further development.

Best Regards,

Nam

[sahire_18]

Hello,
I also faced the somewhere same issue for SPI timings between frame transmission. Configured time is 3usec and actual timing shows nearly 40usec. Can you please tell us the solution . 
We are using NXP MCAL package 2.0.0. Are you already fix this issue in other package.
I am looking forward for your reply!

[biyangdong]

Hi,I have a new problem in used spi with mcal.

when i send a few frame,the dma irq would not be trigger,and spi sequence state always remain spi_seq_pending.

As test result below, Spi_AsyncTransmit() run 8 times,but DMA_SPI2_RX(Tx)_Notification only trigger 7 times,this cause Spi_aSpiSequenceState.Result always SPI_SEQ_PENDING,and can't send spi message anymore. and the logical analyise show rceived 7 spi data.

i dont't konw why the dma irq would not trigger after a few times send,can you help me solve with this problem,thank you very much.

[namnguyenviet]

Hello @biyangdong,

Unfortunately, I have never reproduced your issue yet. See my snapshot:

In my sample, I have continuously sent the SPI by looping the Spi_SetupEB() & Spi_AsyncTransmit(), and check the state of Spi_GetSequenceResult(), which always returned the SPI_SEQ_OK after finished its transmission. I also have set the counter like your application, and counter was increased continuously.

Can you describe how you schedule SPI transmission? Any timing interval setup for each per of transmission? Are you aware of the EB maximum size buffer (which is 64 bytes maximum, as per your configuration), and is there any DET/DEM error reported?

Best Regards,

Nam

[biyangdong]

Hi,Sorry for take your time.

i have found the root cause of this problem.my workmate used wrong dma clear register when develope other modual.which cleared my dma request at runtime.

[biyangdong]

Thanks for your reply.

1.I schedule spi transmission by checking can data changes,and send the data by spi after package it.the schedule describe below

2.the maximum of the data i send is 20+ bytes,and have no DET error reported.

3.As my test,i found it would be occur in some specile conditions,such as when i debug it by steps,it would not be appera,i guess if it is the dma tx irq be preempt by others,but as i add the priority of the dma irq,it not works too,and i also uesd other dma channel,the irq i used showed below:

4. i have no idear for location this problem,could you give me some idears for locate this problem,such as some register or variable for check?thank you very much.

[namnguyenviet]

Hello @biyangdong,

I think it's probably an issue with interrupt configuration. A suggestion is you can try to configure the DMA interrupts, which linked to SPI_2 TX/RX, as category 0 (CAT0), so that  you are able to configure these interrupts' priorities higher than BASEPRI priority. 

Look at the interrupt configuration, I don't see the ISR source 16 (DMA channel 0 transfer complete - which linked to SPI_2 TX as your EB configuration). Is it a missing or you have changed the configuration?

I supposed the DMA configuration should be ok, however you can check the DMA register, eDMA_INT Interrupt Request Register to see whether the DMA interrupt has been triggered, and then check the corresponding NVIC registers.

Best Regards,

Nam

[namnguyenviet]

With 1st question, please send me the configuration (in xdm) so that I can check whether any issue with it. Based on your description, probably the ISR latency is too high. Could you measure the ISR time also?

With 2nd question, my assumption is there would be some higher priority progress during this 50us delay, which is handled by OS, so the delay was increased. Anyway, MCAL doesn't handle this delay, so I can't give you a precise answer.

With 3rd question, please check whether the previous SPI sequence was done before starting a new one, if it was done then Spi_GetSequenceResult() should return SPI_SEQ_OK. A use case for this asynchronous transmit is calling Spi_AsyncTransmit(), then calling Spi_GetSequenceResult() in a period context.

Best Regards,

Nam

[biyangdong]

Hi, i also have the problem 2 i raised above.

the focus of my attention is that why it cost so long time when i called the api function Spi_AsyncTransmit,i made a statistics below.

With debug tools,i get the running time of these three api functions, it shows the most time cost in Spi_AsyncTransmit and Wait SPI_SEQ_OK, and i also record more times,generate a table below

the real signal in analyse is also showed below

i don‘t think it is other interrupt preempt time during Spi_AsyncTransmit funtions running,i also gave a high interrupt priority for spi_dma_rx and tx channel。

in my application,in need send about 100 frame in initialization time, and this problem would cause my initialize overtime or task overtime. please give some suggestions about solving this problem,thank you !

[namnguyenviet]

Hello @biyangdong,

The "Delta Time" is the time consuming for each function call, right? What's the number of sending bytes each time you transfer data? You're still using the DMA method, am I correct?

There are some formal ways to increase the timing for each function: you can increase the CPU clock (core_clk/sys_clk), or you can enable instruction cache (please note that data cache is not recommended to enable while using DMA, due to the fact that DMA might fetch the incorrect data).

Best Regards,

Nam

[biyangdong]

Hi:

Thank you for your reply.

The "Delta Time" is the time consuming for each function call. and i used dma with spi transfer,each frame noly contain 5 bytes.

i used s32k146 chip and the system clk is 80Mhz,i want know if it is normal time consuming for this method,that is to say in your example the time consuming is equal with me. or there is some wrong configuration with my code.

and i test further found that the most time consume is function

Spi_LPspi_ChannelTransferDmaInitTX(LPspi_pDev, *LPspi_pcChannelList);
Spi_LPspi_ChannelTransferDmaInitRX(LPspi_pDev, *LPspi_pcChannelList);

in Spi_LPspi_JobTransfer().

thank you very much.

[namnguyenviet]

Hello @biyangdong,

Interesting... From my site, I have tried with a sample application, and the timing of Spi_AsyncTransmit() is around 64us. Moreover, in my measurement the timing is inconsistent among transmissions, while your results are different among transmissions. (from about 300us to even about 1000us). My SYS_CLK is 64MHz and no cache is used.

I don't think it's related to configuration, due to the fact that the timing performance should be based on code execution and core speed. One possible reason is the level of optimization, as it should be optimized for size (-Osize or -Os, depends on compiler). Could you double check it?

Best Regards,

Nam

[biyangdong]

Thanks for your reply. i used vector davinci to configurate,so i attach spi and mcl confoguration in arxml,please help me to check it.

i used mcl_dma_ch_0_isr for spi tx，and i test the isr run time is 2801.96us-2799.24us = 3us. as follow picture 

and the call stack about the os_Isr_Mcl_DMA_Ch_0_ISR call spi_Lpspi_IsrTxDma_LPSPI_2

the time interval between the frist byte and second byte has 158.5