How can I configure SysTick timer interrupt priority ?

[kyf]

Hello NXP team.

I've tried to config SysTick interrupt without success.

Question 1: How can I change the SysTick IRQ priority ?

I've used the two methods mentioned bellow:

1.  

2.  

Solution 2 ends in DevAsser due to the guard that exists in the RTD function.

My main problem is that I can't find anywhere the correct IRQnumber of SysTic. Not even in the CortexM7 documentation. The IRQn of SysTick into the "S32K344_COMMON.h" has a negative number as an enum but this IRQn can't be used in order to change the SysTick IRQ priority.

I've also seen into the 5.1.4 Core configuration section that the IRQ priority width configuration is 4 (This means that there is only 16 interrupt priority level).

Question 2: Can't I change the priority width configuration as I want ? Is this a fixed value or the 4 is the just the default number ??

Kind regards,

kyf.

[kyf]

Hello @DanNguyenDuy ,

Thank you for your input. I've gone throught the RTD and I've seen that it does not include prigroup register handling and either the system exception priority handling. So I've added my self.

It's a pity though because those stuff are free and are provided from CMSIS drivers of ARM.

Kind regards,

kyf

[DanNguyenDuy · Accepted solution]

Hi kyf,

Question 1: How can I change the SysTick IRQ priority ?

=> Because the Systick is a core interrupt. So, you can't use NVIC to change the priority of SysTick.

Unfortunately, The RTD driver didn't support functions to change the priority of core interrupts.

So, you must interact with the PRI_15 bit field in the SHPR3 ( System Handler Priority Register 3) to change the priority of SysTick.

Question 2: Can't I change the priority width configuration as I want? Is this a fixed value or the 4 is the just the default number ??

=> Yes, this a fixed value. Because the priority width equal width of the PRI_n bit field = 4 bits.

This meaning is the priority of interrupts can change from 0 to 15.

Best regards,

Dan