FlexCAN_Ip_Example_S32K344 Debug Error

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FlexCAN_Ip_Example_S32K344 Debug Error

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moorhou4
Contributor II

Hello, I just received the S32KTBOX and am doing some initial testing of the kit to make sure it is working.

I was able to successfully debug a simple example the Siul2_Dio_Ip_Example_S32K344 and now am starting to debug the FlexCAN_Ip_Example_S32K344 to do a loopback test. When debugging FlexCAN_Ip_Example_S32K344 with the J-Link Base debugger, the code is failing on the Clock_Ip_Init(&Clock_Ip_aClockConfig[0]); call in main.c. Stepping into the code the program fails when distributing the PLL clock to the MCU. This occurred in both the FlexCAN and CAN examples provided

 

It is returning ”WARNING: Failed to read memory @ address 0xFFFFFFFE”. When stepping into this call, the code specifically fails at the green highlighted line in the attached image. The “SelectedCounter” variable, which is the condition for the switch, is set to “OSIF_COUNTER_DUMMY”, which is a valid case, but the code still fails and will not proceed through this switch statement. I have seen some discussion around these similar errors that have to do with the clock configuration in S32DS.

If you have any suggestions please let me know I would really appreciate your time!

ThanksCapture6.PNG

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VaneB
NXP TechSupport
NXP TechSupport

Hi @moorhou4 

All the examples included with the RTDs are made to be supported by the EVB. So if you are using de S32K3 Automotive Telematics Box, you need to ensure the correct Clock and Pin configuration, S32K3-T-BOX FXOSC is 40MHz while EVB is 16MHz, and the Pins are also different from EVB. 

Try this, and let me know if you still have any errors. 

 

B.R.

VaneB

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VaneB
NXP TechSupport
NXP TechSupport

Hi @moorhou4 

All the examples included with the RTDs are made to be supported by the EVB. So if you are using de S32K3 Automotive Telematics Box, you need to ensure the correct Clock and Pin configuration, S32K3-T-BOX FXOSC is 40MHz while EVB is 16MHz, and the Pins are also different from EVB. 

Try this, and let me know if you still have any errors. 

 

B.R.

VaneB

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moorhou4
Contributor II

Thank you so much for the response! Is there a resource to determine which pins need to be configured differently? I am unable to find one. Also, I do not see any configuration options for the FXOSC clock in S32 Design Studio. The next best solution that I assume I should take is editing the code in the Clock_Ip_Cfg.c file.

Thank you

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VaneB
NXP TechSupport
NXP TechSupport

Hi @moorhou4 

The value of FXOSC can be modified at the clock tool of Config Tools.

VaneB_0-1686782315442.png

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moorhou4
Contributor II

I see thank you! Changing the frequency to 40 MHz for FXOSC and altering some other configurations did fix my problem! I have attached my current configuration for any others who may need it.Capture8.PNG

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